公开(公告)号：US07579895B2

公开(公告)日：2009-08-25

申请号：US11932807

申请日：2007-10-31

申请人： Shin-Nan Sun ,  Limin Zhu ,  Theodore Speers ,  Gregory Bakker

发明人： Shin-Nan Sun ,  Limin Zhu ,  Theodore Speers ,  Gregory Bakker

IPC分类号： H03K17/62

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device comprises at least one of a crystal oscillator circuit, an RC oscillator circuit, and an external oscillator input. A clock conditioning circuit is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A real-time clock is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A programmable logic block is coupled to the clock conditioning circuit and the real-time clock.

摘要翻译： 一种可编程片上系统集成电路器件，包括晶体振荡器电路，RC振荡器电路和外部振荡器输入中的至少一个。 时钟调理电路选择性地耦合到可编程逻辑块，晶体振荡器电路，RC振荡器电路和外部振荡器输入之一。 实时时钟可选择性地耦合到可编程逻辑块，晶体振荡器电路，RC振荡器电路和外部振荡器输入之一。 可编程逻辑块耦合到时钟调节电路和实时时钟。

公开(公告)号：US07129746B1

公开(公告)日：2006-10-31

申请号：US10877043

申请日：2004-06-25

申请人： Rabindranath Balasubramanian ,  Limin Zhu ,  Theodore Speers ,  Gregory Bakker

发明人： Rabindranath Balasubramanian ,  Limin Zhu ,  Theodore Speers ,  Gregory Bakker

IPC分类号： H03K19/173

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： An integrated circuit includes a plurality of inputs, a plurality of output pads, a programmable logic block, an analog circuit block, an analog-to-digital converter programmably coupleable to individual analog circuits in the analog circuit block, and an interconnect architecture programmably coupling selected ones of the plurality of inputs, the plurality of outputs, the programmable logic block, the analog circuit block, and the analog-to-digital converter. At least one of the inputs may be programmably configured as one of a digital input programmably coupleable to elements in the programmable logic block or as an analog input to an analog circuit in the analog circuit block.

公开(公告)号：US07675320B2

公开(公告)日：2010-03-09

申请号：US12131377

申请日：2008-06-02

申请人： Theodore Speers ,  Limin Zhu ,  Kurt Kolkind ,  Gregory Bakker

发明人： Theodore Speers ,  Limin Zhu ,  Kurt Kolkind ,  Gregory Bakker

IPC分类号： H03K19/177 ,  G06K13/00 ,  G06K11/00

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device includes a programmable logic block. A digital input/output circuit block is coupled to the programmable logic block. A SRAM block is coupled to the programmable logic block. At least one non-volatile memory block is coupled to the programmable logic block. A JTAG port is coupled to the programmable logic block. An analog circuit block including an analog-to-digital converter may be coupled to the programmable logic block and an analog input/output circuit block may be coupled to the analog circuit block.

摘要翻译： 可编程片上系统集成电路器件包括可编程逻辑块。 数字输入/输出电路块耦合到可编程逻辑块。 SRAM块耦合到可编程逻辑块。 至少一个非易失性存储器块耦合到可编程逻辑块。 JTAG端口耦合到可编程逻辑块。 包括模拟 - 数字转换器的模拟电路块可以耦合到可编程逻辑块，并且模拟输入/输出电路块可以耦合到模拟电路块。

公开(公告)号：US20080122484A1

公开(公告)日：2008-05-29

申请号：US12028615

申请日：2008-02-08

申请人： Limin Zhu ,  Theodore Speers ,  Gregory Bakker

发明人： Limin Zhu ,  Theodore Speers ,  Gregory Bakker

IPC分类号： H03K19/173

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： An integrated circuit device has a state-saving feature and includes a programmable logic block, I/O pads, a dedicated register, at least one volatile memory block, a non-volatile memory block, a condition-sensing circuit for detecting at least one condition, A control circuit such as a state machine controls the saving of states of various volatile memories and registers to the non-volatile memory and also controls the initialization of the volatile registers and memories using the saved state data.

摘要翻译： 集成电路装置具有省电特征，并且包括可编程逻辑块，I / O焊盘，专用寄存器，至少一个易失性存储器块，非易失性存储器块，用于检测至少一个 条件，诸如状态机的控制电路控制各种易失性存储器和寄存器的状态的保存到非易失性存储器，并且还使用保存的状态数据来控制易失性寄存器和存储器的初始化。

公开(公告)号：US07560952B2

公开(公告)日：2009-07-14

申请号：US12028615

申请日：2008-02-08

申请人： Limin Zhu ,  Theodore Speers ,  Gregory Bakker

发明人： Limin Zhu ,  Theodore Speers ,  Gregory Bakker

IPC分类号： H03K19/173

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： An integrated circuit device has a state-saving feature and includes a programmable logic block, I/O pads, a dedicated register, at least one volatile memory block, a non-volatile memory block, a condition-sensing circuit for detecting at least one condition, A control circuit such as a state machine controls the saving of states of various volatile memories and registers to the non-volatile memory and also controls the initialization of the volatile registers and memories using the saved state data.

摘要翻译： 集成电路装置具有省电特征，并且包括可编程逻辑块，I / O焊盘，专用寄存器，至少一个易失性存储器块，非易失性存储器块，用于检测至少一个 条件，诸如状态机的控制电路控制各种易失性存储器和寄存器的状态的保存到非易失性存储器，并且还使用保存的状态数据来控制易失性寄存器和存储器的初始化。

公开(公告)号：US07385418B2

公开(公告)日：2008-06-10

申请号：US11460055

申请日：2006-07-26

申请人： Theodore Speers ,  Limin Zhu ,  Kurt Kolkind ,  Gregory Bakker

发明人： Theodore Speers ,  Limin Zhu ,  Kurt Kolkind ,  Gregory Bakker

IPC分类号： H03K19/177 ,  G06K13/00 ,  G06K11/00

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device includes a programmable logic block. A digital input/output circuit block is coupled to the programmable logic block. A SRAM block is coupled to the programmable logic block. At least one non-volatile memory block is coupled to the programmable logic block. A JTAG port is coupled to the programmable logic block. An analog circuit block including an analog-to-digital converter may be coupled to the programmable logic block and an analog input/output circuit block may be coupled to the analog circuit block.

摘要翻译： 可编程片上系统集成电路器件包括可编程逻辑块。 数字输入/输出电路块耦合到可编程逻辑块。 SRAM块耦合到可编程逻辑块。 至少一个非易失性存储器块耦合到可编程逻辑块。 JTAG端口耦合到可编程逻辑块。 包括模拟 - 数字转换器的模拟电路块可以耦合到可编程逻辑块，并且模拟输入/输出电路块可以耦合到模拟电路块。

公开(公告)号：US07352206B1

公开(公告)日：2008-04-01

申请号：US10857472

申请日：2004-05-28

申请人： Limin Zhu ,  Theodore Speers ,  Gregory Bakker

发明人： Limin Zhu ,  Theodore Speers ,  Gregory Bakker

IPC分类号： H03K19/173

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： An integrated circuit device has a state-saving feature and includes a programmable logic block, I/O pads, a dedicated register, at least one volatile memory block, a non-volatile memory block, a condition-sensing circuit for detecting at least one condition, A control circuit such as a state machine controls the saving of states of various volatile memories and registers to the non-volatile memory and also controls the initialization of the volatile registers and memories using the saved state data.

摘要翻译： 集成电路装置具有省电特征，并且包括可编程逻辑块，I / O焊盘，专用寄存器，至少一个易失性存储器块，非易失性存储器块，用于检测至少一个 条件，诸如状态机的控制电路控制各种易失性存储器和寄存器的状态的保存到非易失性存储器，并且还使用保存的状态数据来控制易失性寄存器和存储器的初始化。

公开(公告)号：US20080030235A1

公开(公告)日：2008-02-07

申请号：US11871741

申请日：2007-10-12

申请人： Shin-Nan Sun ,  Limin Zhu ,  Theodore Speers ,  Gregory Bakker

发明人： Shin-Nan Sun ,  Limin Zhu ,  Theodore Speers ,  Gregory Bakker

IPC分类号： H03D9/00

CPC分类号： H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device comprises at least one of a crystal oscillator circuit, an RC oscillator circuit, and an external oscillator input. A clock conditioning circuit is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A real-time clock is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A programmable logic block is coupled to the clock conditioning circuit and the real-time clock.

摘要翻译： 一种可编程片上系统集成电路器件，包括晶体振荡器电路，RC振荡器电路和外部振荡器输入中的至少一个。 时钟调理电路选择性地耦合到可编程逻辑块，晶体振荡器电路，RC振荡器电路和外部振荡器输入之一。 实时时钟可选择性地耦合到可编程逻辑块，晶体振荡器电路，RC振荡器电路和外部振荡器输入之一。 可编程逻辑块耦合到时钟调节电路和实时时钟。

公开(公告)号：US20060255832A1

公开(公告)日：2006-11-16

申请号：US11460055

申请日：2006-07-26

申请人： Theodore Speers ,  Limin Zhu ,  Kurt Kolkind ,  Gregory Bakker

发明人： Theodore Speers ,  Limin Zhu ,  Kurt Kolkind ,  Gregory Bakker

IPC分类号： H03K19/177

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device includes a programmable logic block. A digital input/output circuit block is coupled to the programmable logic block. A SRAM block is coupled to the programmable logic block. At least one non-volatile memory block is coupled to the programmable logic block. A JTAG port is coupled to the programmable logic block. An analog circuit block including an analog-to-digital converter may be coupled to the programmable logic block and an analog input/output circuit block may be coupled to the analog circuit block.

摘要翻译： 可编程片上系统集成电路器件包括可编程逻辑块。 数字输入/输出电路块耦合到可编程逻辑块。 SRAM块耦合到可编程逻辑块。 至少一个非易失性存储器块耦合到可编程逻辑块。 JTAG端口耦合到可编程逻辑块。 包括模拟 - 数字转换器的模拟电路块可以耦合到可编程逻辑块，并且模拟输入/输出电路块可以耦合到模拟电路块。

公开(公告)号：US07501872B2

公开(公告)日：2009-03-10

申请号：US11871741

申请日：2007-10-12

申请人： Shin-Nan Sun ,  Limin Zhu ,  Theodore Speers ,  Gregory Bakker

发明人： Shin-Nan Sun ,  Limin Zhu ,  Theodore Speers ,  Gregory Bakker

IPC分类号： H03K3/00

CPC分类号： H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device comprises at least one of a crystal oscillator circuit, an RC oscillator circuit, and an external oscillator input. A clock conditioning circuit is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A real-time clock is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A programmable logic block is coupled to the clock conditioning circuit and the real-time clock.