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    Interconnect structure and method for Cu/ultra low k integration
    5.
    发明授权
    Interconnect structure and method for Cu/ultra low k integration 失效
    Cu /超低k集成的互连结构和方法

    公开(公告)号：US08405215B2

    公开(公告)日：2013-03-26

    申请号：US12906580

    申请日：2010-10-18

    申请人： Chih-Chao Yang ,  Conal E. Murray

    发明人： Chih-Chao Yang ,  Conal E. Murray

    IPC分类号： H01L23/52

    CPC分类号： H01L21/76808 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76835 ,  H01L21/76843

    摘要： A semiconductor structure is provided that includes a lower interconnect level including a first dielectric material having at least one conductive feature embedded therein; a dielectric capping layer located on the first dielectric material and some, but not all, portions of the at least one conductive feature; and an upper interconnect level including a second dielectric material having at least one conductively filled via and an overlying conductively filled line disposed therein, wherein the conductively filled via is in contact with an exposed surface of the at least one conductive feature of the first interconnect level by an anchoring area. Moreover, the conductively filled via and conductively filled line of the inventive structure are separated from the second dielectric material by a single continuous diffusion barrier layer. As such, the second dielectric material includes no damaged regions in areas adjacent to the conductively filled line. A method of forming such an interconnect structure is also provided.

    摘要翻译： 提供了一种半导体结构，其包括下互连级，其包括具有嵌入其中的至少一个导电特征的第一介电材料; 位于所述第一电介质材料上的电介质覆盖层以及所述至少一个导电特征的一些但不是全部的部分; 以及包括具有至少一个导电填充通孔的第二介电材料和布置在其中的上覆导电填充线的上部互连水平，其中所述导电填充的通孔与所述第一互连水平的所述至少一个导电特征的暴露表面接触 通过锚定区域。 此外，本发明结构的导电填充通孔和导电填充线通过单个连续扩散阻挡层与第二介电材料分离。 因此，第二电介质材料在与导电填充线相邻的区域中不包括受损区域。 还提供了一种形成这种互连结构的方法。

    INTERCONNECT STRUCTURE AND METHOD FOR Cu/ULTRA LOW k INTEGRATION
    6.
    发明申请
    INTERCONNECT STRUCTURE AND METHOD FOR Cu/ULTRA LOW k INTEGRATION 失效
    Cu / ULTRA低k积分的互连结构和方法

    公开(公告)号：US20110031623A1

    公开(公告)日：2011-02-10

    申请号：US12906580

    申请日：2010-10-18

    申请人： Chih-Chao Yang ,  Conal E. Murray

    发明人： Chih-Chao Yang ,  Conal E. Murray

    IPC分类号： H01L23/52

    CPC分类号： H01L21/76808 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76835 ,  H01L21/76843

    摘要： A semiconductor structure is provided that includes a lower interconnect level including a first dielectric material having at least one conductive feature embedded therein; a dielectric capping layer located on the first dielectric material and some, but not all, portions of the at least one conductive feature; and an upper interconnect level including a second dielectric material having at least one conductively filled via and an overlying conductively filled line disposed therein, wherein the conductively filled via is in contact with an exposed surface of the at least one conductive feature of the first interconnect level by an anchoring area. Moreover, the conductively filled via and conductively filled line of the inventive structure are separated from the second dielectric material by a single continuous diffusion barrier layer. As such, the second dielectric material includes no damaged regions in areas adjacent to the conductively filled line. A method of forming such an interconnect structure is also provided.

    摘要翻译： 提供了一种半导体结构，其包括下互连级，其包括具有嵌入其中的至少一个导电特征的第一介电材料; 位于所述第一电介质材料上的电介质覆盖层以及所述至少一个导电特征的一些但不是全部的部分; 以及包括具有至少一个导电填充通孔的第二介电材料和布置在其中的上覆导电填充线的上部互连水平，其中所述导电填充的通孔与所述第一互连水平的所述至少一个导电特征的暴露表面接触 通过锚定区域。 此外，本发明结构的导电填充通孔和导电填充线通过单个连续扩散阻挡层与第二介电材料分离。 因此，第二电介质材料在与导电填充线相邻的区域中不包括受损区域。 还提供了一种形成这种互连结构的方法。

    NON-PLASMA CAPPING LAYER FOR INTERCONNECT APPLICATIONS
    7.
    发明申请
    NON-PLASMA CAPPING LAYER FOR INTERCONNECT APPLICATIONS 有权
    用于互连应用的非等离子体覆盖层

    公开(公告)号：US20090269929A1

    公开(公告)日：2009-10-29

    申请号：US12108119

    申请日：2008-04-23

    申请人： Chih-Chao Yang ,  Conal E. Murray

    发明人： Chih-Chao Yang ,  Conal E. Murray

    IPC分类号： H01L21/306 ,  H01L23/538 ,  H01L21/311 ,  H01L23/52 ,  H01L23/48 ,  H01L29/40

    CPC分类号： H01L23/53238 ,  H01L21/02074 ,  H01L21/76834 ,  H01L21/76883 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The present invention provides an interconnect structure which has a high leakage resistance and substantially no metallic residues and no physical damage present at an interface between the interconnect dielectric and an overlying dielectric capping layer. The interconnect structure of the invention also has an interface between each conductive feature and the overlying dielectric capping layer that is substantially defect-free. The interconnect structure of the invention includes a non-plasma deposited dielectric capping layer which is formed utilizing a process including a thermal and chemical-only pretreatment step that removes surface oxide from atop each of the conductive features as well as metallic residues from atop the interconnect dielectric material. Following this pretreatment step, the dielectric capping layer is deposited.

    摘要翻译： 本发明提供一种互连结构，其具有高的耐漏电性，并且基本上没有金属残留物，并且在互连电介质和上覆电介质覆盖层之间的界面处不存在物理损伤。 本发明的互连结构还具有每个导电特征和基本上无缺陷的上覆电介质覆盖层之间的界面。 本发明的互连结构包括非等离子体沉积的介电覆盖层，其使用包括热和仅化学预处理步骤的方法形成，该步骤从每个导电特征顶部以及互连上方的金属残留物去除表面氧化物 介电材料。 在该预处理步骤之后，沉积介电覆盖层。

    Reprogrammable electrical fuse
    8.
    发明授权
    Reprogrammable electrical fuse 有权
    可重复编程的电保险丝

    公开(公告)号：US09058887B2

    公开(公告)日：2015-06-16

    申请号：US11928258

    申请日：2007-10-30

    申请人： Louis C. Hsu ,  Conal E. Murray ,  Chandrasekhar Narayan ,  Chih-Chao Yang

    发明人： Louis C. Hsu ,  Conal E. Murray ,  Chandrasekhar Narayan ,  Chih-Chao Yang

    IPC分类号： G06F17/50 ,  G11C17/18 ,  H04L12/701 ,  H04L29/08

    CPC分类号： G11C17/18 ,  G06F17/5045 ,  H04L29/08072 ,  H04L45/00

    摘要： The present invention provides a reprogrammable electrically blowable fuse and associated design structure. The electrically blowable fuse is programmed using an electro-migration effect and is reprogrammed using a reverse electro-migration effect. The state (i.e., “opened” or “closed”) of the electrically blowable fuse is determined by a sensing system which compares a resistance of the electrically blowable fuse to a reference resistance.

    摘要翻译： 本发明提供了一种可再编程的电可熔熔丝和相关的设计结构。 电可熔熔丝使用电迁移效应进行编程，并使用反向电迁移效应重新编程。 可电熔熔丝的状态（即“打开”或“关闭”）由将电可电熔丝的电阻与参考电阻进行比较的感测系统确定。

    Surface repair structure and process for interconnect applications
    9.
    发明授权
    Surface repair structure and process for interconnect applications 有权
    互连应用的表面修复结构和过程

    公开(公告)号：US08802563B2

    公开(公告)日：2014-08-12

    申请号：US13603051

    申请日：2012-09-04

    申请人： Chih-Chao Yang ,  Conal E. Murray

    发明人： Chih-Chao Yang ,  Conal E. Murray

    IPC分类号： H01L21/44

    CPC分类号： H01L21/76877 ,  H01L21/7684 ,  H01L21/76849 ,  H01L23/53238 ,  H01L2924/0002 ,  Y02P80/30 ,  H01L2924/00

    摘要： A method is provided which includes providing a dielectric material having a dielectric constant of about 4.0 or less and at least one conductive material embedded therein, the at least one conductive material has an upper surface that is coplanar with an upper surface of the dielectric material and the upper surface of the at least one conductive material has hollow-metal related defects that extend inward into the at least one conductive material; and filling the hollow-metal related defects with a surface repair material.

    摘要翻译： 提供了一种方法，其包括提供具有约4.0或更小的介电常数的介电材料和嵌入其中的至少一种导电材料，所述至少一种导电材料具有与电介质材料的上表面共面的上表面， 所述至少一个导电材料的上表面具有向内延伸到所述至少一个导电材料中的中空金属相关缺陷; 并用表面修复材料填充与中空金属相关的缺陷。

    SURFACE REPAIR STRUCTURE AND PROCESS FOR INTERCONNECT APPLICATIONS
    10.
    发明申请
    SURFACE REPAIR STRUCTURE AND PROCESS FOR INTERCONNECT APPLICATIONS 有权
    表面修复结构和互连应用程序

    公开(公告)号：US20120329270A1

    公开(公告)日：2012-12-27

    申请号：US13603051

    申请日：2012-09-04

    申请人： Chih-Chao Yang ,  Conal E. Murray

    发明人： Chih-Chao Yang ,  Conal E. Murray

    IPC分类号： H01L21/768

    CPC分类号： H01L21/76877 ,  H01L21/7684 ,  H01L21/76849 ,  H01L23/53238 ,  H01L2924/0002 ,  Y02P80/30 ,  H01L2924/00

    摘要： A method is provided which includes providing a dielectric material having a dielectric constant of about 4.0 or less and at least one conductive material embedded therein, the at least one conductive material has an upper surface that is coplanar with an upper surface of the dielectric material and the upper surface of the at least one conductive material has hollow-metal related defects that extend inward into the at least one conductive material; and filling the hollow-metal related defects with a surface repair material.

    摘要翻译： 提供了一种方法，其包括提供具有约4.0或更小的介电常数的介电材料和嵌入其中的至少一种导电材料，所述至少一种导电材料具有与电介质材料的上表面共面的上表面， 所述至少一个导电材料的上表面具有向内延伸到所述至少一个导电材料中的中空金属相关缺陷; 并用表面修复材料填充与中空金属相关的缺陷。