摘要:
Chip identification pads for identification of integrated circuits in an assembly. In one example embodiment, an integrated circuit (IC) assembly includes a controller, a plurality of ICs, a shared communication bus connecting the controller to the plurality of ICs and configured to enable communication between the controller and each of the plurality of ICs, and a set of one or more chip identification pads formed on each IC. Each set of chip identification pads has an electrical connection pattern. The electrical connection pattern of each set is distinct from the electrical connection pattern on every other set. Each distinct electrical connection pattern represents a unique identifier of the corresponding IC thereby enabling the controller to distinguish between the ICs.
摘要:
An optical receiver comprising at least one processor and a memory including at least one of an encryption key or a decryption key and at least one of encryption microcode or decryption microcode that includes processor-executable instructions that, when executed by the at least one processor, cause the optical transceiver to perform the following: an act of performing an encryption or decryption operation on data received from a host computing system to thereby authenticate the optical transceiver.
摘要:
An optical receiver comprising at least one processor and a memory including at least one of an encryption key or a decryption key and at least one of encryption microcode or decryption microcode that includes processor-executable instructions that, when executed by the at least one processor, cause the optical transceiver to perform the following: an act of performing an encryption or decryption operation on data received from a host computing system to thereby authenticate the optical transceiver.
摘要:
Chip identification pads for identification of integrated circuits in an assembly. In one example embodiment, an integrated circuit (IC) assembly includes a controller, a plurality of ICs, a shared communication bus connecting the controller to the plurality of ICs and configured to enable communication between the controller and each of the plurality of ICs, and a set of one or more chip identification pads formed on each IC. Each set of chip identification pads has an electrical connection pattern. The electrical connection pattern of each set is distinct from the electrical connection pattern on every other set. Each distinct electrical connection pattern represents a unique identifier of the corresponding IC thereby enabling the controller to distinguish between the ICs.
摘要:
An optical transceiver that custom logs information based on input from a host computing system (hereinafter referred to as a “host”). The optical transceiver receives input from the host concerning which operational information to log; the operational information may include statistical data about system operation, or measured parameters, or any other measurable system characteristic. The input from the host may also specify one or more storage locations corresponding to the identified operational information. If one or more storage locations are specified, the optical transceiver logs the information to the corresponding storage locations, which may be an on-transceiver persistent memory, the memory of the host or any other accessible logging location. Additionally, the input from the host may specify one or more actions to be performed when the identified information is logged. If one or more actions are specified, the optical transceiver performs the specified actions when the information is logged.
摘要:
An optical transceiver (or optical transmitter or optical receiver) that includes a memory and a processor, which receives and executes custom microcode from a host computing system (hereinafter referred to simply as a “host”). A user identifies desired optical transceiver operational features, each of which may be implemented using specific microcode. The memory receives custom microcode that aggregates all the specific microcode of the identified operational features from the host. The processor may later execute the custom microcode and cause the transceiver to perform the operational features.
摘要:
An operational optical transceiver configured to update operational firmware using an optical link of the transceiver. The optical transceiver includes at least one processor and a system memory capable of receiving firmware. The optical transceiver receives an optical signal over the optical link containing the update firmware. The optical transceiver then recovers the firmware from the optical signal. Finally, the optical transceiver provides to the system memory the recovered firmware, which when executed by the at least one processor alters the operation of the transceiver.
摘要:
An operational optical transceiver configured to initiate operation in loop back mode. The optical transceiver includes transmit and receive signal paths, a memory capable of having microcode written to it, and a configurable switch array that is used to connect and disconnect the two signal paths as appropriate for a desired loop back mode. The microcode is structured to cause the optical transceiver to control the configurable switch array. This allows for analysis and diagnostics of the signal data.
摘要:
An operational optical transceiver microcontroller configured to initiate a self-test using internalized loop backs. The microcontroller includes a memory, at least one processor and a number of input and output terminals. The output terminals are coupled to internally corresponding input terminals by a configurable switch. The memory receives microcode that, when executed by the processor, causes the microcontroller to close the switches so as to internally connect the output and input terminals. A signal is then asserted on the output terminal. This signal loops back and is received by the input terminal. The processor may then detect the microcontroller's response to the signal.
摘要:
An optical transceiver (or optical transmitter or optical receiver) that has at least one processor and a memory. The optical transceiver receives encrypted microcode from a source. The optical transceiver may then decrypt the received microcode to create decrypted microcode. The decrypted microcode is then written to the memory, where it may be executed by the at least one processor. The microcode, when executed by the at least one processor, controls one or more functions of the optical transceiver.