摘要:
A charged particle detector and method are disclosed providing for simultaneous detection and measurement of charged particles at one or more levels of particle flux in a measurement cycle. The detector provides multiple and independently selectable levels of integration and/or gain in a fully addressable readout manner.
摘要:
A charged particle detector and method are disclosed providing for simultaneous detection and measurement of charged particles at one or more levels of particle flux in a measurement cycle. The detector provides multiple and independently selectable levels of integration and/or gain in a fully addressable readout manner.
摘要:
A charged particle detector and method are disclosed providing for simultaneous detection and measurement of charged particles at one or more levels of particle flux in a measurement cycle. The detector provides multiple and independently selectable levels of integration and/or gain in a fully addressable readout manner.
摘要:
A column buffer for use with a pixel cell array includes an amplifier coupled to three read-out circuits in parallel providing a signal corresponding to accumulated photon-generated charge in a pixel cell plus noise, a reset level plus noise, and a pedestal level, respectively. These three signals are used to generate an ultra-low noise signal Di=Si−Pi-1−G*(Ri−Ri-1), wherein S is the sampled signal, P is the pedestal level, R is the reset level, and G is a gain associated with a pixel cell, and wherein i is a frame number greater than 0. The three signals can be read-out simultaneously. In another embodiment, the three signals are obtained from a column buffer having only one output. In this case, the signals are read-out sequentially.
摘要:
A column buffer for use with a pixel cell array includes an amplifier coupled to three read-out circuits in parallel providing a signal corresponding to accumulated photon-generated charge in a pixel cell plus noise, a reset level plus noise, and a pedestal level, respectively. These three signals are used to generate an ultra-low noise signal Di=Si−Pi-1−G*(Ri−Ri-1), wherein S is the sampled signal, P is the pedestal level, R is the reset level, and G is a gain associated with a pixel cell, and wherein i is a frame number greater than 0. The three signals can be read-out simultaneously. In another embodiment, the three signals are obtained from a column buffer having only one output. In this case, the signals are read-out sequentially.
摘要:
An active pixel sensor cell array in which a partial transimpedance amplifier amplifies the output of each cell. The pixel sensor cell array comprises a plurality of pixel sensor cells and a second part of the amplifier. Each pixel sensor cell comprises a photo-sensitive element, a capacitor and a first part of an amplifier. The capacitor is coupled between a terminal of the photo-sensitive element and an output line of the cell. The capacitor is operable to provide a capacitive feedback in the pixel sensor cell. The second part of the amplifier is coupled to the output lines of a plurality of pixel sensor cells. The amplifier is configured to amplify an output signal from a cell.
摘要:
In one aspect of the present invention, a light sensor is provided in the active pixel sensor cell for sensing incident radiation. The voltage corresponding to the photon-generated or other radiation-generated charge in the active pixel sensor cell is stored on a storage node via a sample-and-hold capacitor. Additional elements, such as source-follower transistors, may reside between the sensing element and the sample-and-hold capacitor. The signal is read via a readout source-follower (RSF) transistor. The readout source-follower drain is connected to the row select switch while its drain is connected to the output node on the column output bus. This configuration couples the storage node to the gate-source capacitance of the readout source-follower transistor. This allows the voltage on the storage node to increase proportionally to the increase in voltage on the readout node when the row select is closed and thus enables the drain current to flow through the RSF to the column output bus.
摘要:
Methods of forming a multi-segment chip or integrated circuit device are provided. The multi-segment chip may comprise at least two blocks, such as an analog integrated circuit block and a digital integrated circuit block, with substrates that are isolated from each other. Thus, each block may have independent operation voltage or other characteristics.
摘要:
In one aspect, the present invention provides an active pixel sensor array with optimized matching between pixels and strength and frequency of incoming signals such as photons absorbed. The array comprises multiple pixels of individual geometry corresponds to spatial location. Each pixel full-well is adjustable via modifiable pixel conversion gain while maintaining pixel linearity. Furthermore each pixel internally stores multiple of extremely high frequency samples. Variable pixel geometry per row is very advantageous for Echelle spectrograph, where pixel heights are aligned with the spectrograph “order separator” where the resolution changes. In combination with variable geometry, externally adjustable full-well provides for superior spectral line separation in spectroscopy applications. In one embodiment multiple time windows with intermittent resets are stored within each pixel. This feature allows for the detection of extreme high frequency consecutive events without saturation such as may be the case with LIBS (Laser Induced Breakdown Spectroscopy).
摘要:
In one aspect of the present invention, a light sensor is provided in the active pixel sensor cell for sensing incident radiation. The voltage corresponding to the photon-generated or other radiation-generated charge in the active pixel sensor cell is stored on a storage node via a sample-and-hold capacitor. Additional elements, such as source-follower transistors, may reside between the sensing element and the sample-and-hold capacitor. The signal is read via a readout source-follower (RSF) transistor. The readout source-follower drain is connected to the row select switch while its drain is connected to the output node on the column output bus. This configuration couples the storage node to the gate-source capacitance of the readout source-follower transistor. This allows the voltage on the storage node to increase proportionally to the increase in voltage on the readout node when the row select is closed and thus enables the drain current to flow through the RSF to the column output bus.