公开(公告)号：US20180159531A1

公开(公告)日：2018-06-07

申请号：US15371285

申请日：2016-12-07

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Ming-Yin Lee ,  Wen-Tsung Huang ,  Shih-Yu Wang

IPC: H03K17/687 ,  H01L27/092 ,  H01L27/06 ,  H01L27/02

CPC classification number: H03K17/6872 ,  H01L27/0266 ,  H01L27/0629 ,  H01L27/0928

Abstract: A semiconductor structure includes a first heavily doped region, a first well, a second well and a second heavily doped region disposed sequentially. The first well and the second heavily doped region have a first conductive type. The second well and the first heavily doped region have a second conductive type. The semiconductor structure further includes at least one switch, such that at least one of conditions (A) and (B) is satisfied. (A) The switch is coupled between the first well and the first node such that the first well is controlled by the switch and floated under an ESD protection mode. (B) The switch is coupled between the second well and the second node such that the second well is controlled by the switch and floated under an ESD protection mode.

公开(公告)号：US10084449B2

公开(公告)日：2018-09-25

申请号：US15371285

申请日：2016-12-07

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Ming-Yin Lee ,  Wen-Tsung Huang ,  Shih-Yu Wang

IPC: H01L27/02 ,  H03K17/687 ,  H01L27/092 ,  H01L27/06

CPC classification number: H03K17/6872 ,  H01L27/0262 ,  H01L27/0266

Abstract: A semiconductor structure includes a first heavily doped region, a first well, a second well and a second heavily doped region disposed sequentially. The first well and the second heavily doped region have a first conductive type. The second well and the first heavily doped region have a second conductive type. The semiconductor structure further includes at least one switch, such that at least one of conditions (A) and (B) is satisfied. (A) The switch is coupled between the first well and the first node such that the first well is controlled by the switch and floated under an ESD protection mode. (B) The switch is coupled between the second well and the second node such that the second well is controlled by the switch and floated under an ESD protection mode.

公开(公告)号：US10147716B2

公开(公告)日：2018-12-04

申请号：US15086119

申请日：2016-03-31

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Shih-Yu Wang ,  Ming-Yin Lee ,  Wen-Tsung Huang

IPC: H01L27/02 ,  H02H9/04

Abstract: An ESD protection apparatus includes a semiconductor substrate, a first well, a second well, a first doping region, a second doping region, a third doping region and a fourth doping region. The first well and the second well respectively having a first conductivity and a second conductivity are disposed in the semiconductor substrate. The first doping region having the second conductivity is disposed in the first well. The second doping region having the first conductivity is at least partially disposed in the first well and surrounds the first doping region. The third doping region and the fourth doping region respectively having the first conductivity and the second conductivity are disposed in the second well. The first doping region, the third doping region, the first well and the second well are integrated to form a first parasitic BJT and a second parasitic BJT that have different majority carriers.

公开(公告)号：US20170287899A1

公开(公告)日：2017-10-05

申请号：US15084557

申请日：2016-03-30

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Shih-Yu Wang ,  Ming-Yin Lee ,  Wen-Tsung Huang

IPC: H01L27/02 ,  H01L29/10 ,  H01L27/06 ,  G11C7/24 ,  H01L29/06 ,  H01L23/50 ,  H02H9/04 ,  H01L27/105

CPC classification number: H01L27/0277 ,  G11C7/1084 ,  G11C7/24 ,  G11C2207/105 ,  H01L23/50 ,  H01L27/0629 ,  H01L27/105 ,  H01L29/0688 ,  H01L29/1079 ,  H01L29/1095 ,  H02H9/046

Abstract: An ESD protection apparatus includes a semiconductor substrate, a first gate structure, a first doping region, a second doping region and a third doping region. The semiconductor substrate has a doping well with a first conductivity one end of which is grounded. The first gate structure is disposed on the doping well. The first doping region having a second conductivity, is disposed in the doping well and adjacent to the first gate structure, and is electrically connected to a pad. The second doping region having the second conductivity is disposed in the doping well and adjacent to the first gate structure. The third doping region having the first conductivity is disposed in the doping well and forms a P/N junction interface with the second doping region, wherein the second doping region and the third doping region respectively have a doping concentration substantially greater than that of the doping well.

公开(公告)号：US20170287895A1

公开(公告)日：2017-10-05

申请号：US15086119

申请日：2016-03-31

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Shih-Yu Wang ,  Ming-Yin Lee ,  Wen-Tsung Huang

IPC: H01L27/02 ,  H02H9/04

CPC classification number: H01L27/0262 ,  H01L29/0653 ,  H01L29/7436 ,  H02H9/04

Abstract: An ESD protection apparatus includes a semiconductor substrate, a first well, a second well, a first doping region, a second doping region, a third doping region and a fourth doping region. The first well and the second well respectively having a first conductivity and a second conductivity are disposed in the semiconductor substrate. The first doping region having the second conductivity is disposed in the first well. The second doping region having the first conductivity is at least partially disposed in the first well and surrounds the first doping region. The third doping region and the fourth doping region respectively having the first conductivity and the second conductivity are disposed in the second well. The first doping region, the third doping region, the first well and the second well are integrated to form a first parasitic BJT and a second parasitic BJT that have different majority carriers.

公开(公告)号：US10181466B2

公开(公告)日：2019-01-15

申请号：US15084557

申请日：2016-03-30

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Shih-Yu Wang ,  Ming-Yin Lee ,  Wen-Tsung Huang

IPC: H01L27/02 ,  H02H9/04 ,  H01L29/10 ,  H01L27/105 ,  G11C7/24 ,  H01L29/06 ,  H01L23/50 ,  H01L27/06

Abstract: An ESD protection apparatus includes a semiconductor substrate, a first gate structure, a first doping region, a second doping region and a third doping region. The semiconductor substrate has a doping well with a first conductivity one end of which is grounded. The first gate structure is disposed on the doping well. The first doping region having a second conductivity, is disposed in the doping well and adjacent to the first gate structure, and is electrically connected to a pad. The second doping region having the second conductivity is disposed in the doping well and adjacent to the first gate structure. The third doping region having the first conductivity is disposed in the doping well and forms a P/N junction interface with the second doping region, wherein the second doping region and the third doping region respectively have a doping concentration substantially greater than that of the doping well.

公开(公告)号：US20180374838A1

公开(公告)日：2018-12-27

申请号：US15631141

申请日：2017-06-23

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Wen-Tsung Huang ,  Ming-Yin Lee ,  Shih-Yu Wang

IPC: H01L27/02 ,  H01L29/78 ,  H01L29/08

Abstract: A semiconductor structure comprises a transistor. The transistor comprises a semiconductor substrate, a first source/drain side doped region, a second source/drain side doped region and a gate structure. The first source/drain side doped region comprises a lower doped portion having a conductivity type opposing to a conductivity type of the semiconductor substrate. The second source/drain side doped region comprises a first doped portion extended downward from an upper surface of the semiconductor substrate. The second source/drain side doped region has a bottom PN junction with the semiconductor substrate. The lower doped portion has a bottom surface below the bottom PN junction. A dopant concentration of the first doped portion is larger than a dopant concentration of the lower doped portion having the same conductivity type with the first doped portion.