PROTECTION CIRCUIT AND INPUT CIRCUIT SUITABLE FOR INTEGRATED CIRCUIT
    1.
    发明申请
    PROTECTION CIRCUIT AND INPUT CIRCUIT SUITABLE FOR INTEGRATED CIRCUIT 有权
    保护电路和适用于集成电路的输入电路

    公开(公告)号:US20160164277A1

    公开(公告)日:2016-06-09

    申请号:US14561681

    申请日:2014-12-05

    Inventor: Chieh-Wei He

    Abstract: An input circuit suitable for an integrated circuit (IC) and a protection circuit in the input circuit are provided. The protection circuit includes a transistor, a voltage selector, an inverter, a resistor and a switch circuit. The transistor is coupled to an input end of the protection circuit. The voltage selector is coupled to the transistor and the input end of the protection circuit, and outputs a lower one of a voltage at the input end of the protection circuit and a ground voltage to the transistor. The inverter is coupled to the transistor. The resistor is coupled between a power supply voltage and the inverter. The switch circuit is coupled to the inverter, a preset voltage and an output end of the protection circuit and is controlled by the inverter to connect the preset voltage to the output end or to switch the output end to a floating state.

    Abstract translation: 提供了适用于输入电路中的集成电路(IC)和保护电路的输入电路。 保护电路包括晶体管,电压选择器,逆变器,电阻器和开关电路。 晶体管耦合到保护电路的输入端。 电压选择器耦合到晶体管和保护电路的输入端,并且在保护电路的输入端输出一个电压中的较低的一个,并将地电压输出到晶体管。 反相器耦合到晶体管。 电阻耦合在电源电压和逆变器之间。 开关电路耦合到逆变器,保护电路的预设电压和输出端,并由变频器控制,将预设电压连接到输出端,或将输出端切换到浮置状态。

    Electrostatic discharge protection device
    2.
    发明授权
    Electrostatic discharge protection device 有权
    静电放电保护装置

    公开(公告)号:US09129821B1

    公开(公告)日:2015-09-08

    申请号:US14272162

    申请日:2014-05-07

    Inventor: Chieh-Wei He

    CPC classification number: H01L27/0629 H01L27/0255 H01L27/0266 H01L27/0288

    Abstract: An electrostatic discharge protection device including a protection circuit, a first resister and a low-pass filter is provided. The protection circuit includes a first element and a second element. The first element and the second element are electrically connected in series between a power line and a ground line, and a connection node is disposed between the first element and the second element. The low-pass filter, the protection circuit and the first resister are electrically connected in series between an input pad and an internal circuit.

    Abstract translation: 提供一种包括保护电路,第一电阻和低通滤波器的静电放电保护装置。 保护电路包括第一元件和第二元件。 第一元件和第二元件在电力线和接地线之间串联电连接,并且连接节点设置在第一元件和第二元件之间。 低通滤波器,保护电路和第一电阻串联在输入焊盘和内部电路之间。

    ELECTROSTATIC DISCHARGE PROTECTION DEVICE
    3.
    发明申请
    ELECTROSTATIC DISCHARGE PROTECTION DEVICE 审中-公开
    静电放电保护装置

    公开(公告)号:US20160241021A1

    公开(公告)日:2016-08-18

    申请号:US14624409

    申请日:2015-02-17

    CPC classification number: H02H9/046

    Abstract: An electrostatic discharge protection device that includes a plurality of voltage drop elements, an impedance element, a driving circuit, and a clamping circuit is provided. The voltage drop elements are electrically connected in series between a first line and a node, and the voltage drop elements are configured to define an activating voltage. If a signal from the first line is greater than the activating voltage, the voltage drop elements conduct the first line to the node in response to the signal from the first line. The impedance element is electrically connected between the node and a second line. The driving circuit amplifies a control signal from the node and accordingly generates a driving signal. The clamping circuit determines whether to generate a discharging path between the first line and the second line according to the driving signal.

    Abstract translation: 提供了包括多个电压降元件,阻抗元件,驱动电路和钳位电路的静电放电保护器件。 电压降元件在第一线路和节点之间串联电连接,并且电压降元件被配置为限定激活电压。 如果来自第一行的信号大于激活电压,则电压降元件响应于来自第一行的信号将第一行传导到节点。 阻抗元件电连接在节点和第二线之间。 驱动电路放大来自节点的控制信号,从而产生驱动信号。 钳位电路根据驱动信号确定是否在第一线路与第二线路之间产生放电路径。

    Protection circuit and input circuit suitable for integrated circuit
    4.
    发明授权
    Protection circuit and input circuit suitable for integrated circuit 有权
    保护电路和输入电路适用于集成电路

    公开(公告)号:US09401603B2

    公开(公告)日:2016-07-26

    申请号:US14561681

    申请日:2014-12-05

    Inventor: Chieh-Wei He

    Abstract: An input circuit suitable for an integrated circuit (IC) and a protection circuit in the input circuit are provided. The protection circuit includes a transistor, a voltage selector, an inverter, a resistor and a switch circuit. The transistor is coupled to an input end of the protection circuit. The voltage selector is coupled to the transistor and the input end of the protection circuit, and outputs a lower one of a voltage at the input end of the protection circuit and a ground voltage to the transistor. The inverter is coupled to the transistor. The resistor is coupled between a power supply voltage and the inverter. The switch circuit is coupled to the inverter, a preset voltage and an output end of the protection circuit and is controlled by the inverter to connect the preset voltage to the output end or to switch the output end to a floating state.

    Abstract translation: 提供了适用于输入电路中的集成电路(IC)和保护电路的输入电路。 保护电路包括晶体管,电压选择器,逆变器,电阻器和开关电路。 晶体管耦合到保护电路的输入端。 电压选择器耦合到晶体管和保护电路的输入端,并且在保护电路的输入端输出一个电压中的较低的一个,并将地电压输出到晶体管。 反相器耦合到晶体管。 电阻耦合在电源电压和逆变器之间。 开关电路耦合到逆变器,保护电路的预设电压和输出端,并由变频器控制,将预设电压连接到输出端,或将输出端切换到浮置状态。

    ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT, STRUCTURE AND METHOD OF MAKING THE SAME
    5.
    发明申请
    ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT, STRUCTURE AND METHOD OF MAKING THE SAME 审中-公开
    静电放电保护电路,其结构及其制造方法

    公开(公告)号:US20160141287A1

    公开(公告)日:2016-05-19

    申请号:US14595753

    申请日:2015-01-13

    CPC classification number: H01L21/8249 H01L27/0262 H01L27/027

    Abstract: An ESD structure, including a first conductive type substrate, a second conductive type well region in the substrate, first/second doped regions (the first type), fourth to sixth doped regions (second conductive type), and first/second gates, is provided. The first/second doped regions are respectively disposed in the well region and the substrate. The first/second gates are on the substrate surface with no well region below. A third doped region is between the first and second gates in the substrate. The fourth doped region is in the substrate and on one side of the first/second gates. The fifth doped region is in the substrate, extends into the well region, and on another side of the first/second gates. The first doped region is located between the fifth and sixth doped region. The first/sixth doped regions and the first gate are connected. The fourth/second doped region and the second gate are connected.

    Abstract translation: 包括第一导电型衬底,衬底中的第二导电类型阱区域,第一/第二掺杂区域(第一类型),第四至第六掺杂区域(第二导电型)和第一/第二栅极的ESD结构是 提供。 第一/第二掺杂区分别设置在阱区和衬底中。 第一/第二栅极位于衬底表面上,下面没有良好的区域。 第三掺杂区域位于衬底中的第一和第二栅极之间。 第四掺杂区域位于衬底中并且在第一/第二栅极的一侧上。 第五掺杂区域在衬底中,延伸到阱区域中,并且在第一/第二栅极的另一侧上。 第一掺杂区位于第五和第六掺杂区之间。 连接第一/第六掺杂区和第一栅。 连接第四/第二掺杂区和第二栅。

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