公开(公告)号：US09570117B2

公开(公告)日：2017-02-14

申请号：US14507357

申请日：2014-10-06

Applicant: Macronix International Co., Ltd.

Inventor： Hsiang-Lan Lung ,  Tu-Shun Chen

IPC: G11C5/14 ,  G11C16/30 ,  G11C11/4074 ,  G11C29/12 ,  G11C29/48 ,  G11C5/06

CPC classification number: G11C5/14 ,  G11C5/063 ,  G11C5/143 ,  G11C5/147 ,  G11C11/4074 ,  G11C16/30 ,  G11C29/1201 ,  G11C29/48

Abstract: An integrated circuit includes circuitry performing memory operations. The power from only one of a first power lead and a second power lead is sufficient for the circuitry to operate. A package encasing the integrated circuit. Leads on the package electrically couple power and data from an exterior of the package to the integrated circuit encased by the package, including the first power lead, the second power lead, and a ground lead. An isolation circuit electrically couples the circuitry to the first power lead but not the second lead at a first time, and electrically couples the circuitry to the second power lead but not the first power lead at a second time.

Abstract translation: 集成电路包括执行存储器操作的电路。 仅来自第一电源线和第二电源线中的一个的电力足以使电路运行。 封装集成电路的封装。 封装上的引线将电源和数据从封装的外部电耦合到由封装封装的集成电路，包括第一电源引线，第二电源引线和接地引线。 隔离电路在第一时间将电路电耦合到第一电源线而不耦合第二引线，并且在第二时间将电路电耦合到第二电源线而不耦合第一电源线。

公开(公告)号：US20160328288A1

公开(公告)日：2016-11-10

申请号：US14703183

申请日：2015-05-04

Applicant: MACRONIX International Co., Ltd.

Inventor： Hsin-Yi Ho ,  Hsiang-Lan Lung ,  Wei-Chih Chien ,  Tu-Shun Chen ,  Chia-Jung Chen

IPC: G06F11/10 ,  G06F3/06

CPC classification number: G06F3/0683 ,  G06F3/0619 ,  G06F3/064 ,  G06F11/1048

Abstract: A memory device and an operation method thereof are provided, and the operation method of the memory device includes following steps. A programming operation is performed to write an original data into a first memory array in the memory device. The original data in the first memory array is verified, and whether to generate a write signal is determined according to a verification result. An error correction code is generated according to the original data, and the error correction code and a write address are stored temporarily in a buffer circuit of the memory device. When the write signal is generated, the error correction code and the write address in the buffer circuit are written into a second memory array in the memory device.

Abstract translation: 提供了一种存储器件及其操作方法，并且存储器件的操作方法包括以下步骤。 执行编程操作以将原始数据写入存储器件中的第一存储器阵列。 验证第一存储器阵列中的原始数据，并根据验证结果确定是否生成写入信号。 根据原始数据生成纠错码，并将纠错码和写入地址临时存储在存储装置的缓冲电路中。 当产生写入信号时，将缓冲电路中的纠错码和写入地址写入存储器件中的第二存储器阵列。

公开(公告)号：US09507663B1

公开(公告)日：2016-11-29

申请号：US14703183

申请日：2015-05-04

Applicant: MACRONIX International Co., Ltd.

Inventor： Hsin-Yi Ho ,  Hsiang-Lan Lung ,  Wei-Chih Chien ,  Tu-Shun Chen ,  Chia-Jung Chen

IPC: G11C29/00 ,  G06F11/10 ,  G06F3/06

CPC classification number: G06F3/0683 ,  G06F3/0619 ,  G06F3/064 ,  G06F11/1048

Abstract: A memory device and an operation method thereof are provided, and the operation method of the memory device includes following steps. A programming operation is performed to write an original data into a first memory array in the memory device. The original data in the first memory array is verified, and whether to generate a write signal is determined according to a verification result. An error correction code is generated according to the original data, and the error correction code and a write address are stored temporarily in a buffer circuit of the memory device. When the write signal is generated, the error correction code and the write address in the buffer circuit are written into a second memory array in the memory device.

Abstract translation: 提供了一种存储器件及其操作方法，并且存储器件的操作方法包括以下步骤。 执行编程操作以将原始数据写入存储器件中的第一存储器阵列。 验证第一存储器阵列中的原始数据，并根据验证结果确定是否生成写入信号。 根据原始数据生成纠错码，并将纠错码和写入地址临时存储在存储装置的缓冲电路中。 当产生写入信号时，将缓冲电路中的纠错码和写入地址写入存储器件中的第二存储器阵列。

公开(公告)号：US20160099028A1

公开(公告)日：2016-04-07

申请号：US14507357

申请日：2014-10-06

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Hsiang-Lan Lung ,  Tu-Shun Chen

IPC: G11C5/14 ,  H05K3/32 ,  G11C7/00

CPC classification number: G11C5/14 ,  G11C5/063 ,  G11C5/143 ,  G11C5/147 ,  G11C11/4074 ,  G11C16/30 ,  G11C29/1201 ,  G11C29/48

Abstract: An integrated circuit includes circuitry performing memory operations. The power from only one of a first power lead and a second power lead is sufficient for the circuitry to operate. A package encasing the integrated circuit. Leads on the package electrically couple power and data from an exterior of the package to the integrated circuit encased by the package, including the first power lead, the second power lead, and a ground lead. An isolation circuit electrically couples the circuitry to the first power lead but not the second lead at a first time, and electrically couples the circuitry to the second power lead but not the first power lead at a second time.

Abstract translation: 集成电路包括执行存储器操作的电路。 仅来自第一电源线和第二电源线中的一个的电力足以使电路运行。 封装集成电路的封装。 封装上的引线将电源和数据从封装的外部电耦合到由封装封装的集成电路，包括第一电源引线，第二电源引线和接地引线。 隔离电路在第一时间将电路电耦合到第一电源线而不耦合第二引线，并且在第二时间将电路电耦合到第二电源线而不耦合第一电源线。