公开(公告)号：US20240071994A1

公开(公告)日：2024-02-29

申请号：US17895353

申请日：2022-08-25

Applicant: Mellanox Technologies, Ltd.

Inventor： Igal Kushnir ,  Ayal Eshkoli

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/48

CPC classification number: H01L25/0652 ,  H01L23/481 ,  H01L24/16 ,  H01L2224/16225

Abstract: Technologies for chip-to-chip (C2C) yield and performance optimization in a die stacking platform are described. One apparatus includes a substrate, a first integrated circuit disposed on the substrate at a first location, a second integrated circuit disposed on the substrate at a second location, and a third integrated circuit disposed on the second integrated circuit. The second integrated circuit is coupled to the first integrated circuit using a first chip-to-chip (C2C) interface via a physical terminal. The third integrated circuit is coupled to the first integrated circuit using a second C2C interface via the physical terminal. Only one of the first C2C interface and the second C2C interface is active at a time.

公开(公告)号：US12294383B1

公开(公告)日：2025-05-06

申请号：US17151348

申请日：2021-01-18

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Eshel Gordon ,  Boris Sharav ,  Roi Levi ,  Ayal Eshkoli

IPC: H03M1/66 ,  H02H9/04 ,  H03M1/36 ,  H03M1/68 ,  H03M3/00

Abstract: A digital-to-charge converter, a digital-to-analog converter, and a method of operating a digital-to-charge converter are provided. An illustrative method of operating a digital-to-charge converter is provided that includes: receiving a digital input signal at the digital to charge converter, charging one or more capacitors during a pre-evaluation period, where the one or more capacitors are charged with a supply voltage based the digital input signal, disconnecting the one or more capacitors from the supply voltage during an evaluation period, and generating an analog output signal from the digital to charge converter based on an evaluation of charge of the one or more capacitors during the evaluation period.