SYSTEMS AND METHODS OF INITIATING RETRANSMISSION REQUESTS

    公开(公告)号:US20250158739A1

    公开(公告)日:2025-05-15

    申请号:US19026299

    申请日:2025-01-16

    Abstract: A communication system is described, among other things. An illustrative system is disclosed to include one or more decoding circuits to perform forward error correction for a received data block in a physical layer and one or more cyclic redundancy check circuits to perform a cyclic redundancy check based on a first output of the decoding circuits and a cyclic redundancy check code generated in the physical layer based on the received data block. In response to one or more of a second output of the decoding circuits and an output of the cyclic redundancy check circuits, a retransmission request of the data block is initiated.

    Systems and methods of initiating retransmission requests

    公开(公告)号:US12244416B2

    公开(公告)日:2025-03-04

    申请号:US18192239

    申请日:2023-03-29

    Abstract: A communication system is described, among other things. An illustrative system is disclosed to include one or more decoding circuits to perform forward error correction for a received data block in a physical layer and one or more cyclic redundancy check circuits to perform a cyclic redundancy check based on a first output of the decoding circuits and a cyclic redundancy check code generated in the physical layer based on the received data block. In response to one or more of a second output of the decoding circuits and an output of the cyclic redundancy check circuits, a retransmission request of the data block is initiated.

    SYSTEMS AND METHODS OF INITIATING RETRANSMISSION REQUESTS

    公开(公告)号:US20240333423A1

    公开(公告)日:2024-10-03

    申请号:US18192239

    申请日:2023-03-29

    CPC classification number: H04L1/0057 H04L1/0041

    Abstract: A communication system is described, among other things. An illustrative system is disclosed to include one or more decoding circuits to perform forward error correction for a received data block in a physical layer and one or more cyclic redundancy check circuits to perform a cyclic redundancy check based on a first output of the decoding circuits and a cyclic redundancy check code generated in the physical layer based on the received data block. In response to one or more of a second output of the decoding circuits and an output of the cyclic redundancy check circuits, a retransmission request of the data block is initiated.

    Link efficient power state management for multi-segment switched fabrics

    公开(公告)号:US20240039689A1

    公开(公告)日:2024-02-01

    申请号:US17994326

    申请日:2022-11-27

    CPC classification number: H04L7/02

    Abstract: In one embodiment, a retimer device includes a receiver to receive data from a first device via a data link, retimer circuitry to recover a clock phase from the received data, and prepare a new copy of the received data sampled by a clean clock based on the recovered clock phase, a transmitter to transmit the new copy to a second device via the data link, wherein the receiver is configured to receive an in-band standby signal from the first device having a given pattern in a physical layer of the signal, activate a power saving mode of the retimer device responsively to the standby signal having the given pattern in the physical layer of the standby signal, receive an in-band wakeup signal from the first device, and initiate an exit from the power saving mode to power up the retimer device responsively to the wakeup signal.

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