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公开(公告)号:US11847089B2
公开(公告)日:2023-12-19
申请号:US17730628
申请日:2022-04-27
Applicant: Mellanox Technologies Ltd.
Inventor: Haim Kupershmidt , Ortal Bashan , Avi Ganor , Roman Meltser , Tom Munk , Doron Fael , Dvir Edry , Hamza Marie
IPC: G06F13/42
CPC classification number: G06F13/4282 , G06F2213/0016
Abstract: An electronic device connectable to a network interface device having a plurality of signal lanes may include a first computing device, a second computing device, and an interface to connect the first computing device to a first subset of signal lanes of the plurality of data lanes of the network interface device and connect the second computing device to a second subset of data lanes of the plurality of data lanes of the network computing device.
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公开(公告)号:US20250158739A1
公开(公告)日:2025-05-15
申请号:US19026299
申请日:2025-01-16
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Asaf Horev , Ran Ravid , Guy Lederman , Roman Meltser
IPC: H04L1/00
Abstract: A communication system is described, among other things. An illustrative system is disclosed to include one or more decoding circuits to perform forward error correction for a received data block in a physical layer and one or more cyclic redundancy check circuits to perform a cyclic redundancy check based on a first output of the decoding circuits and a cyclic redundancy check code generated in the physical layer based on the received data block. In response to one or more of a second output of the decoding circuits and an output of the cyclic redundancy check circuits, a retransmission request of the data block is initiated.
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公开(公告)号:US12244416B2
公开(公告)日:2025-03-04
申请号:US18192239
申请日:2023-03-29
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Asaf Horev , Ran Ravid , Guy Lederman , Roman Meltser
Abstract: A communication system is described, among other things. An illustrative system is disclosed to include one or more decoding circuits to perform forward error correction for a received data block in a physical layer and one or more cyclic redundancy check circuits to perform a cyclic redundancy check based on a first output of the decoding circuits and a cyclic redundancy check code generated in the physical layer based on the received data block. In response to one or more of a second output of the decoding circuits and an output of the cyclic redundancy check circuits, a retransmission request of the data block is initiated.
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公开(公告)号:US20240333423A1
公开(公告)日:2024-10-03
申请号:US18192239
申请日:2023-03-29
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Asaf Horev , Ran Ravid , Guy Lederman , Roman Meltser
IPC: H04L1/00
CPC classification number: H04L1/0057 , H04L1/0041
Abstract: A communication system is described, among other things. An illustrative system is disclosed to include one or more decoding circuits to perform forward error correction for a received data block in a physical layer and one or more cyclic redundancy check circuits to perform a cyclic redundancy check based on a first output of the decoding circuits and a cyclic redundancy check code generated in the physical layer based on the received data block. In response to one or more of a second output of the decoding circuits and an output of the cyclic redundancy check circuits, a retransmission request of the data block is initiated.
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公开(公告)号:US20240039689A1
公开(公告)日:2024-02-01
申请号:US17994326
申请日:2022-11-27
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Roman Meltser , Guy Lederman , Ran Ravid , Zvi Rechtman , Lavi Koch
IPC: H04L7/02
CPC classification number: H04L7/02
Abstract: In one embodiment, a retimer device includes a receiver to receive data from a first device via a data link, retimer circuitry to recover a clock phase from the received data, and prepare a new copy of the received data sampled by a clean clock based on the recovered clock phase, a transmitter to transmit the new copy to a second device via the data link, wherein the receiver is configured to receive an in-band standby signal from the first device having a given pattern in a physical layer of the signal, activate a power saving mode of the retimer device responsively to the standby signal having the given pattern in the physical layer of the standby signal, receive an in-band wakeup signal from the first device, and initiate an exit from the power saving mode to power up the retimer device responsively to the wakeup signal.
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