公开(公告)号：US20210042251A1

公开(公告)日：2021-02-11

申请号：US16537576

申请日：2019-08-11

Applicant: MELLANOX TECHNOLOGIES TLV LTD.

Inventor： Lion Levi ,  Aviv Kfir ,  Idan Matari ,  Ran Shani ,  Zachy Haramaty ,  Nir Monovich ,  Matty Kadosh

IPC: G06F13/28 ,  G06F13/40 ,  H04L12/861 ,  H04L12/725

Abstract: A network element includes one or more ports for communicating over a network, a processor and packet processing hardware. The packet processing hardware is configured to transfer packets to and from the ports, and further includes data-transfer circuitry for data transfer with the processor. The processor and the data-transfer circuitry are configured to transfer between one another (i) one or more communication packets for transferal between the ports and the processor and (ii) one or more databases for transferal between the packet processing hardware and the processor, by (i) translating, by the processor, the transferal of both the communication packets and the databases into work elements, and posting the work elements on one or more work queues in a memory of the processor, and (ii) using the data-transfer circuitry, executing the work elements so as to transfer both the communication packets and the databases.

公开(公告)号：US10915479B1

公开(公告)日：2021-02-09

申请号：US16537576

申请日：2019-08-11

Applicant: MELLANOX TECHNOLOGIES TLV LTD.

Inventor： Lion Levi ,  Aviv Kfir ,  Idan Matari ,  Ran Shani ,  Zachy Haramaty ,  Nir Monovich ,  Matty Kadosh

IPC: G06F13/28 ,  H04L12/725 ,  H04L12/861 ,  G06F13/40

Abstract: A network element includes one or more ports for communicating over a network, a processor and packet processing hardware. The packet processing hardware is configured to transfer packets to and from the ports, and further includes data-transfer circuitry for data transfer with the processor. The processor and the data-transfer circuitry are configured to transfer between one another (i) one or more communication packets for transferal between the ports and the processor and (ii) one or more databases for transferal between the packet processing hardware and the processor, by (i) translating, by the processor, the transferal of both the communication packets and the databases into work elements, and posting the work elements on one or more work queues in a memory of the processor, and (ii) using the data-transfer circuitry, executing the work elements so as to transfer both the communication packets and the databases.