公开(公告)号：US20210081324A1

公开(公告)日：2021-03-18

申请号：US16573527

申请日：2019-09-17

Applicant: Micron Technology, Inc.

Inventor： Samuel E. Bradshaw ,  Justin M. Eno ,  Sean S. Eilert ,  Shivasankar Gunasekaran ,  Hongyu Wang ,  Shivam Swami

IPC: G06F12/1009 ,  G06F12/1027

Abstract: A computer system includes physical memory devices of different types that store randomly-accessible data in memory of the computer system. In one approach, access to memory in an address space is maintained by an operating system of the computer system. A virtual page is associated with a first memory type. A page table entry is generated to map a virtual address of the virtual page to a physical address in a first memory device of the first memory type. The page table entry is used by a memory management unit to store the virtual page at the physical address.

公开(公告)号：US20210056350A1

公开(公告)日：2021-02-25

申请号：US16545854

申请日：2019-08-20

Applicant: Micron Technology, Inc.

Inventor： Kenneth Marion Curewitz ,  Ameen D. Akel ,  Hongyu Wang ,  Sean Stephen Eilert

IPC: G06K9/62 ,  G06N3/08 ,  G06F13/16

Abstract: A system having multiple devices that can host different versions of an artificial neural network (ANN) as well as different versions of a feature dictionary. In the system, encoded inputs for the ANN can be decoded by the feature dictionary, which allows for encoded input to be sent to a master version of the ANN over a network instead of an original version of the input which usually includes more data than the encoded input. Thus, by using the feature dictionary for training of a master ANN there can be reduction of data transmission.

公开(公告)号：US20190007529A1

公开(公告)日：2019-01-03

申请号：US15989920

申请日：2018-05-25

Applicant: Micron Technology, Inc.

Inventor： Kenneth M. Curewitz ,  Sean Eilert ,  Ameen D. Akel ,  Hongyu Wang

IPC: H04L29/06 ,  G06F3/06 ,  G06F9/38

Abstract: A method, an apparatus, and a system have been disclosed. An embodiment of the method includes an autonomous memory device receiving a set of instructions, the memory device executing the set of instructions, combining the set of instructions with any data recovered from the memory device in response to the set of instructions into a packet, and transmitting the packet from the memory device.

公开(公告)号：US11650742B2

公开(公告)日：2023-05-16

申请号：US16573490

申请日：2019-09-17

Applicant: Micron Technology, Inc.

Inventor： Kenneth Marion Curewitz ,  Shivasankar Gunasekaran ,  Ameen D. Akel ,  Hongyu Wang ,  Justin M. Eno ,  Shivam Swami ,  Samuel E. Bradshaw

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F3/06 ,  G06F12/1027

CPC classification number: G06F3/0631 ,  G06F3/0607 ,  G06F3/0673 ,  G06F12/1027

Abstract: A computer system stores metadata that is used to identify physical memory devices that store randomly-accessible data for memory of the computer system. In one approach, access to memory in an address space is maintained by an operating system of the computer system. Stored metadata associates a first address range of the address space with a first memory device, and a second address range of the address space with a second memory device. The operating system manages processes running on the computer system by accessing the stored metadata. This management includes allocating memory based on the stored metadata so that data for a first process is stored in the first memory device, and data for a second process is stored in the second memory device.

公开(公告)号：US20220156201A1

公开(公告)日：2022-05-19

申请号：US17665823

申请日：2022-02-07

Applicant: Micron Technology, Inc.

Inventor： Kenneth Marion Curewitz ,  Sean S. Eilert ,  Hongyu Wang ,  Samuel E. Bradshaw ,  Shivasankar Gunasekaran ,  Justin M. Eno ,  Shivam Swami

IPC: G06F12/1009 ,  G06F12/1027

Abstract: A computer system includes physical memory devices of different types that store randomly-accessible data in a main memory of the computer system. In one approach, data is stored in memory at one or more logical addresses allocated to an application by an operating system. The data is physically stored in a first memory device of a first memory type (e.g., NVRAM). The operating system determines an access pattern for the stored data. In response to determining the access pattern, the data is moved from the first memory device to a second memory device of a different memory type (e.g., DRAM).

公开(公告)号：US20210191875A1

公开(公告)日：2021-06-24

申请号：US17192744

申请日：2021-03-04

Applicant: Micron Technology, Inc.

Inventor： Samuel E. Bradshaw ,  Shivasankar Gunasekaran ,  Hongyu Wang ,  Justin M. Eno

IPC: G06F12/1009 ,  G06F3/06 ,  G06F12/1027 ,  G06F9/50

Abstract: A computer system includes physical memory devices of different types that store randomly-accessible data in a main memory of the computer system. In one approach, an operating system allocates memory from a namespace for use by an application. The namespace is a logical reference to physical memory devices in which physical addresses are defined. The namespace is bound to a memory type. In response to binding the namespace to the memory type, the operating system adjusts a page table to map a logical memory address in the namespace to a memory device of the memory type.

公开(公告)号：US10169226B2

公开(公告)日：2019-01-01

申请号：US15393919

申请日：2016-12-29

Applicant: Micron Technology, Inc.

Inventor： Jared E. Hulbert ,  John C. Rudelic ,  Hongyu Wang

IPC: G06F12/08 ,  G06F12/02 ,  G06F9/50 ,  G06F12/0888 ,  G06F3/06 ,  G06F12/0804 ,  G06F12/1009 ,  G11C11/56 ,  G11C13/00 ,  G11C16/04 ,  G11C15/04

Abstract: Applications may request persistent storage in nonvolatile memory. The persistent storage is maintained across power events and application instantiations. Persistent storage may be maintained by systems with or without memory management units.

公开(公告)号：US20170351737A1

公开(公告)日：2017-12-07

申请号：US15685950

申请日：2017-08-24

Applicant: Micron Technology, Inc.

Inventor： Kenneth M. Curewitz ,  Sean Eilert ,  Hongyu Wang ,  Ameen D. Akel

IPC: G06F17/30

CPC classification number: G06F16/24569

Abstract: Methods and systems operate to receive a plurality of search requests for searching a database in a memory system. The search requests can be stored in a FIFO queue and searches can be subsequently generated for each search request. The resulting plurality of searches can be executed substantially in parallel on the database. A respective indication is transmitted to a requesting host when either each respective search is complete or each respective search has generated search results.

公开(公告)号：US09779138B2

公开(公告)日：2017-10-03

申请号：US13965739

申请日：2013-08-13

Applicant: Micron Technology, Inc.

Inventor： Kenneth M Curewitz ,  Sean Eilert ,  Hongyu Wang ,  Ameen D. Akel

IPC: G06F17/30 ,  G06F17/00

CPC classification number: G06F17/30519

Abstract: Methods and systems operate to receive a plurality of search requests for searching a database in a memory system. The search requests can be stored in a FIFO queue and searches can be subsequently generated for each search request. The resulting plurality of searches can be executed substantially in parallel on the database. A respective indication is transmitted to a requesting host when either each respective search is complete or each respective search has generated search results.

公开(公告)号：US11755884B2

公开(公告)日：2023-09-12

申请号：US16545813

申请日：2019-08-20

Applicant: Micron Technology, Inc.

Inventor： Sean Stephen Eilert ,  Shivasankar Gunasekaran ,  Ameen D. Akel ,  Kenneth Marion Curewitz ,  Hongyu Wang

IPC: G06N3/04 ,  G06N3/045 ,  G06N20/20 ,  G06N3/048

CPC classification number: G06N3/045 ,  G06N3/048 ,  G06N20/20

Abstract: A system having multiple devices that can host different versions of an artificial neural network (ANN). In the system, changes to local versions of the ANN can be combined with a master version of the ANN. In the system, a first device can include memory that can store the master version, a second device can include memory that can store a local version of the ANN, and there can be many devices that store local versions of the ANN. The second device (or any other device of the system hosting a local version) can include a processor that can train the local version, and a transceiver that can transmit changes to the local version generated from the training. The first device can include a transceiver that can receive the changes to a local version, and a processing device that can combine the received changes with the master version.