公开(公告)号：US20170160977A1

公开(公告)日：2017-06-08

申请号：US15434503

申请日：2017-02-16

Applicant: Micron Technology, Inc.

Inventor： Samuel D. Post ,  Eric Anderson

IPC: G06F3/06

CPC classification number: G06F3/0635 ,  G06F3/0611 ,  G06F3/0613 ,  G06F3/0644 ,  G06F3/0659 ,  G06F3/0673 ,  G06F3/0679 ,  G06F12/0246 ,  G11C16/32

Abstract: A memory device may comprise circuitry to adjust between latency and throughput in transferring information through a memory port, wherein the circuitry may be capable of configuring individual partitions or individual sectors as high-throughput storage or low-latency storage.

公开(公告)号：US09116837B2

公开(公告)日：2015-08-25

申请号：US14269970

申请日：2014-05-05

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Samuel D. Post ,  Jared E. Hulbert

IPC: G06F12/02 ,  G06F12/12 ,  G06F3/048

CPC classification number: G06F12/126 ,  G06F3/048 ,  G06F12/0246 ,  G06F2212/2022 ,  G06F2212/46 ,  G06F2212/461 ,  G06F2212/462 ,  G06F2212/463

Abstract: Systems and methods relating to pinning selected data to sectors in non-volatile memory. A graphical user interface allows a user to specify certain data (e.g., directories or files) to be pinned. A list of pinned sectors can be stored so that a driver or controller that operates on a sector basis and not a file or directory basis can identify data to be pinned.

Abstract translation: 将选定数据固定在非易失性存储器中的扇区相关的系统和方法。 图形用户界面允许用户指定要固定的某些数据（例如，目录或文件）。 可以存储固定扇区的列表，使得以扇区为基础而不是基于文件或目录的操作的驱动器或控制器可以标识要被固定的数据。

公开(公告)号：US10990308B2

公开(公告)日：2021-04-27

申请号：US16739534

申请日：2020-01-10

Applicant: Micron Technology, Inc.

Inventor： Samuel D. Post ,  Eric Anderson

IPC: G06F3/06 ,  G06F12/02 ,  G11C16/32

Abstract: A memory device may comprise circuitry to adjust between latency and throughput in transferring information through a memory port, wherein the circuitry may be capable of configuring individual partitions or individual sectors as high-throughput storage or low-latency storage.

公开(公告)号：US20200150889A1

公开(公告)日：2020-05-14

申请号：US16739534

申请日：2020-01-10

Applicant: Micron Technology, Inc.

Inventor： Samuel D. Post ,  Eric Anderson

IPC: G06F3/06

Abstract: A memory device may comprise circuitry to adjust between latency and throughput in transferring information through a memory port, wherein the circuitry may be capable of configuring individual partitions or individual sectors as high-throughput storage or low-latency storage.

公开(公告)号：US10545695B2

公开(公告)日：2020-01-28

申请号：US15434503

申请日：2017-02-16

Applicant: Micron Technology, Inc.

Inventor： Samuel D. Post ,  Eric Anderson

IPC: G06F12/02 ,  G06F3/06

Abstract: A memory device may comprise circuitry to adjust between latency and throughput in transferring information through a memory port, wherein the circuitry may be capable of configuring individual partitions or individual sectors as high-throughput storage or low-latency storage.