公开(公告)号：US11088147B2

公开(公告)日：2021-08-10

申请号：US16453788

申请日：2019-06-26

Applicant: Micron Technology, Inc.

Inventor： Jaydip Guha ,  Saurabh Keshav ,  Srinivas Pulugurtha ,  Mohd Kamran Akhtar ,  James B. Franek ,  Alex J. Schrinsky

IPC: H01L27/108 ,  H01L21/263 ,  H01L21/223

Abstract: Apparatus, such as electronic devices and structures thereof, include at least one doped surface of a base (e.g., semiconductor) material. A dopant of the at least one doped surface is concentrated along the surface, defining a thickness, on or in the base material, not exceeding about one atomic layer. Methods for forming the doped surfaces involve gas-phase doping exposed surfaces of the base material in situ, within a same material-removal tool used to form at least one opening defined at least partially by the base material and into which the dopant is to be introduced.

公开(公告)号：US08778762B2

公开(公告)日：2014-07-15

申请号：US13708789

申请日：2012-12-07

Applicant: Micron Technology, Inc.

Inventor： Saurabh Keshav ,  Scott Pook ,  Fatma Arzum Simsek-Ege

IPC: H01L21/336

CPC classification number: H01L29/66833 ,  H01L27/11556 ,  H01L27/11582 ,  H01L29/66825 ,  H01L29/7889 ,  H01L29/7926

Abstract: Some embodiments include methods of forming vertically-stacked structures, such as vertically-stacked memory cells. A first hardmask is formed over a stack of alternating electrically conductive levels and electrically insulative levels. A first opening is formed through the first hardmask and the stack. Cavities are formed to extend into the electrically conductive levels. A fill material is formed within the first opening and within the cavities. A second hardmask is formed over the first hardmask and over the fill material. A second opening is formed through the second hardmask. The second opening is narrower than the first opening. The second opening is extended into the fill material to form an upwardly-opening container from the fill material. Sidewalls of the upwardly-opening container are removed, while leaving the fill material within the cavities as a plurality of vertically-stacked structures.

Abstract translation: 一些实施例包括形成垂直堆叠结构的方法，例如垂直堆叠的存储单元。 第一个硬掩模形成在交替导电水平和电绝缘水平的叠层上。 通过第一硬掩模和堆叠形成第一开口。 形成腔以延伸到导电水平。 填充材料形成在第一开口内并在空腔内。 在第一个硬掩模和填充材料上形成第二个硬掩模。 通过第二硬掩模形成第二个开口。 第二个开口比第一个开口窄。 第二开口延伸到填充材料中以从填充材料形成向上开口的容器。 去除向上开口的容器的侧壁，同时将填充材料留在空腔内作为多个垂直堆叠的结构。

公开(公告)号：US11271002B2

公开(公告)日：2022-03-08

申请号：US16382932

申请日：2019-04-12

Applicant: Micron Technology, Inc.

Inventor： M. Jared Barclay ,  Merri L. Carlson ,  Saurabh Keshav ,  George Matamis ,  Young Joon Moon ,  Kunal R. Parekh ,  Paolo Tessariol ,  Vinayak Shamanna

IPC: H01L27/11556 ,  H01L27/11519 ,  H01L21/311 ,  H01L27/11582 ,  H01L27/11565

Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming a construction comprising a stack that have vertically-alternating insulative tiers and wordline tiers. An array of openings is formed in an uppermost portion of upper material that is above the stack, and the openings comprise channel openings and dummy openings. At least the uppermost portion of the upper material is used as a mask while etching the channel openings and the dummy openings into a lower portion of the upper material. The channel openings are etched into the insulative and wordline tiers. The channel openings are etched deeper into the construction than the dummy openings, and channel material is formed in the channel openings after the etching. Structures independent of method are disclosed.

公开(公告)号：US20220157844A1

公开(公告)日：2022-05-19

申请号：US17590266

申请日：2022-02-01

Applicant: Micron Technology, Inc.

Inventor： M. Jared Barclay ,  Merri L. Carlson ,  Saurabh Keshav ,  George Matamis ,  Young Joon Moon ,  Kunal R. Parekh ,  Paolo Tessariol ,  Vinayak Shamanna

IPC: H01L27/11556 ,  H01L27/11519 ,  H01L21/311 ,  H01L27/11582 ,  H01L27/11565

Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming a construction comprising a stack that have vertically-alternating insulative tiers and wordline tiers. An array of openings is formed in an uppermost portion of upper material that is above the stack, and the openings comprise channel openings and dummy openings. At least the uppermost portion of the upper material is used as a mask while etching the channel openings and the dummy openings into a lower portion of the upper material. The channel openings are etched into the insulative and wordline tiers. The channel openings are etched deeper into the construction than the dummy openings, and channel material is formed in the channel openings after the etching. Structures independent of method are disclosed.

公开(公告)号：US20200328222A1

公开(公告)日：2020-10-15

申请号：US16382932

申请日：2019-04-12

Applicant: Micron Technology, Inc.

Inventor： M. Jared Barclay ,  Merri L. Carlson ,  Saurabh Keshav ,  George Matamis ,  Young Joon Moon ,  Kunal R. Parekh ,  Paolo Tessariol ,  Vinayak Shamanna

IPC: H01L27/11556 ,  H01L27/11519 ,  H01L27/11565 ,  H01L27/11582 ,  H01L21/311

Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming a construction comprising a stack that have vertically-alternating insulative tiers and wordline tiers. An array of openings is formed in an uppermost portion of upper material that is above the stack, and the openings comprise channel openings and dummy openings. At least the uppermost portion of the upper material is used as a mask while etching the channel openings and the dummy openings into a lower portion of the upper material. The channel openings are etched into the insulative and wordline tiers. The channel openings are etched deeper into the construction than the dummy openings, and channel material is formed in the channel openings after the etching. Structures independent of method are disclosed.

公开(公告)号：US20140162418A1

公开(公告)日：2014-06-12

申请号：US13708789

申请日：2012-12-07

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Saurabh Keshav ,  Scott Pook ,  Fatma Arzum Simsek-Ege

IPC: H01L29/66

CPC classification number: H01L29/66833 ,  H01L27/11556 ,  H01L27/11582 ,  H01L29/66825 ,  H01L29/7889 ,  H01L29/7926

Abstract: Some embodiments include methods of forming vertically-stacked structures, such as vertically-stacked memory cells. A first hardmask is formed over a stack of alternating electrically conductive levels and electrically insulative levels. A first opening is formed through the first hardmask and the stack. Cavities are formed to extend into the electrically conductive levels. A fill material is formed within the first opening and within the cavities. A second hardmask is formed over the first hardmask and over the fill material. A second opening is formed through the second hardmask. The second opening is narrower than the first opening. The second opening is extended into the fill material to form an upwardly-opening container from the fill material. Sidewalls of the upwardly-opening container are removed, while leaving the fill material within the cavities as a plurality of vertically-stacked structures.

Abstract translation: 一些实施例包括形成垂直堆叠结构的方法，例如垂直堆叠的存储单元。 第一个硬掩模形成在交替导电水平和电绝缘水平的叠层上。 通过第一硬掩模和堆叠形成第一开口。 形成腔以延伸到导电水平。 填充材料形成在第一开口内并在空腔内。 在第一个硬掩模和填充材料上形成第二个硬掩模。 通过第二硬掩模形成第二个开口。 第二个开口比第一个开口窄。 第二开口延伸到填充材料中以从填充材料形成向上开口的容器。 去除向上开口的容器的侧壁，同时将填充材料留在空腔内作为多个垂直堆叠的结构。