-
公开(公告)号：US3735484A
公开(公告)日：1973-05-29
申请号：US3735484D
申请日：1970-12-17
Applicant: MOTOROLA INC
CPC classification number: C23G1/22 , C23C22/08 , C23C22/38 , H01L21/00 , Y10S438/906
Abstract: To prevent corrosion of aluminum metallization of semiconductor devices, the device, including the aluminum metallization thereof is phosphated with a phosphate solution that includes no sodium. The phosphating may take place before the leads are provided or after. Portions of the phosphated surface may be covered by deposited glass. Then the phosphated semiconductor device or IC may be encapsulated in a plastic material in a known manner.
Abstract translation: 为了防止半导体器件的铝金属化的腐蚀，包括其铝金属化的器件用不含钠的磷酸盐溶液磷酸化。 磷化可能在提供引线或之后发生。 磷酸盐化表面的一部分可以被沉积的玻璃覆盖。 然后磷化半导体器件或IC可以以已知的方式封装在塑料材料中。
-
2.发明授权
公开(公告)号：US3770499A
公开(公告)日：1973-11-06
申请号：US3770499D
申请日：1972-02-28
Applicant: MOTOROLA INC
CPC classification number: C23F1/02 , Y10S148/017 , Y10S148/118
Abstract: It is known to deposit zirconium dioxide, ZrO2, on a substrate comprising a chip or wafer by providing zirconium oxychloride, ZrOCl2, vapor at about 550* C, the chip or wafer being at 450* C, in an atmosphere containing water vapor. Zirconium dioxide, ZrO2, and hydrochloric acid, HCl, are produced and a layer of the ZrO2 is deposited on the chip. The ZrO2 layer acts as a passivation material having high resistivity and very good impermeability to sodium which can be destructive of the circuit on the chip or wafer. According to this invention, the ZrO2 may be deposited on a substrate at a lower temperature from a liquid solution of the zirconium oxychloride, whereby the substrate may be paper or plastic and whereby the substrate if it includes a circuit will not be injured by the temperature needed by the prior art high temperature treatment, and therefore the possible injury to the substrate or to the circuit therein by the prior art high temperature treatment is avoided.
Abstract translation: 已知在含有水蒸汽的气氛中，通过在约550℃（芯片或晶片）在450℃下，通过提供氧氯化锆，ZrOCl 2，蒸气将包含芯片或晶片的二氧化锆ZrO 2沉积在二氧化锆上。 产生二氧化锆，ZrO 2和盐酸HCl，并将一层ZrO 2沉积在芯片上。 ZrO 2层用作具有高电阻率和对钠的非常好的不渗透性的钝化材料，其可能破坏芯片或晶片上的电路。 根据本发明，ZrO 2可以在较低的温度下从氯氧化锆的液体溶液沉积在基底上，由此基底可以是纸或塑料，从而如果包括电路的基底将不会受到温度的损害 通过现有技术的高温处理需要，因此避免了通过现有技术的高温处理对基板或其电路的可能的损伤。
-
公开(公告)号：US3775120A
公开(公告)日：1973-11-27
申请号：US3775120D
申请日：1972-03-27
Applicant: MOTOROLA INC
Abstract: There is disclosed a high valued vertical resistor whose high value is a result of contacing the resistive film 10 through pinholes 16 in an insulating film 15 on top of the resistive film. The value is controlled by the areal density of pinholes through the thin overlaying insulating film such that the higher the areal density the lower the resistance value for the particular resistor. The resistor is completed by providing a metal layer 20 over the pinholed film such that the metal extends through the pinholes to the resistive layer making contact thereto at a multiplicity of points. The number and size of the contacts made to the resistive layer as well as the resistivity and thickness of the resistive layer controls the total resistance value of the resistor. The holes in the thin insulating film are formed and the hole size and number controlled by one of three methods involving the use of opaque particles, metal particles and porous photorresists as masks for etching the thin insulating film. In one embodiment metallization fills the pinholes in the thin insulating layer so as to provide a multiplicity of contacts to the resistive layer which are spaced and insulated one from another. The structure in this case can be used as a sensing device for determinging a planar contact area of an electrically conducting structure contiguous to the top surface of the resistor, the contact area varying in an inverse manner with the resistance of the resistor. The structure fabricated without continuous overlaying metallization can also be used as a sensing device for sensing the contact area of a resilient structure having a conductive film on the outside thereof. The greatest utility of the vertical resistor thus formed is in electrical circuits in which a high but accurate resistive value for the resistor must be obtained. The resistance value of the resistor is provided by altering the areal density of the pinholes in the thin insulating film.
Abstract translation: 公开了一种高价值的垂直电阻器，其高值是在电阻膜顶部的绝缘膜15中通过针孔16与电阻膜10相连的结果。 该值由通过薄覆盖绝缘膜的针孔的面密度控制，使得面密度越高，特定电阻器的电阻值越低。 电阻器通过在小孔化膜上方设置金属层20来完成，使得金属通过针孔延伸到电阻层，以在多个点处与其接触。 电阻层的接点的数量和尺寸以及电阻层的电阻率和厚度控制电阻的总电阻值。 形成薄绝缘膜中的孔，并且通过使用不透明颗粒，金属颗粒和多孔光热绝缘体的三种方法之一来控制孔尺寸和数量，作为用于蚀刻薄绝缘膜的掩模。
-
公开(公告)号：US3728231A
公开(公告)日：1973-04-17
申请号：US3728231D
申请日：1971-04-08
Applicant: MOTOROLA INC
Inventor： GUREV H
Abstract: THERE IS DISCLOSED AN ULTRAFINE APERTURE METAL MASK AND A METHOD FOR FORMING THE MASK INVOLVING AN ELECTROPLATING STEP. APERTURES ARE FIRST FORMED BY CONVENTIONAL TECHNIQUES THROUGH A METAL LAYER WHICH IS DEPOSITED ON A GLASS, RESIN, CERAMIC OR SEMICONDUCTOR TYPE SUBSTRATE. THEREAFTER, THE PATTERNED METAL FILM IS IMMERSED IN AN ELECTROPLATING BATH WHICH ELECTROPLATES A METAL WHICH ADHERES TO THE METAL FILM SO AS TO CLOSE DOWN THE ALREADY FORMED APERTURES IN THE METAL FILM. THE SUBSTRATE IS NONCONDUCTIVE SUCH THAT THE METAL FROM THE ELECTROPLATING BATH DOES NOT DEPOSIT ON THE SUBSTRATE. IN THIS MANNER PINHOLES ON THE ORDER OF 0.1 TO 0.2 MICRON CAN BE FORMED FROM APERTURES HAVING MEAN DIAMETERS OF BETWEEN 1 AND 25 MICRONS INITIALLY. THE ULTRAFINE APERTURE METAL MASK THUS FORMED MAY BE USED IN ITSELF AS A GAS FILTER, AS A DIFFUSION MASK AND AS A RADIATION MASK FOR X-RAY, GAMMARAY OR LIGHT. AS A LIGHT MASK IT IS MOST GENERALLY USED FOR MAKING OTHER PINHOLD STRUCTURES BY PHOTOLITHOGRAPHIC PROCESS. IN ADDITION THE METAL MASK MAY BE DIRECTLY FOR MAKING OTHER PINHOLE STRUCTURES BY ETCHING THROUGH THE MASK WITH ETCHANTS WHICH DO ATACK THE MASK ITSELF. IN ONE EMBODIMEN THE METAL MASK IS USED EITHER DIRECTLY OR INDIRECTLY TO PATTERN A GLASSY SUBSTRATE SO THAT THE GLASSY SUBSTRATE THEN FORMS A DIFFUSION BARRIER, A METALLIZATION MASK, A FILTER OR A SCREEN.
-
-
-
Search Results
4
records
(took 0.011 seconds)
