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公开(公告)号：US11763022B2
公开(公告)日：2023-09-19
申请号：US17650584
申请日：2022-02-10
IPC分类号： G06F21/62 , G06F16/28 , G06F16/2452
CPC分类号： G06F21/6227 , G06F16/2452 , G06F16/285 , G06F21/6245
摘要： Methods and systems for generating a response to a query using an AI engine. One method includes translating a received query into a profile comprised of at least a query type and a priority. The method further includes collecting, based on the profile, a first set of data items from a first data file storing data categorized as general public data and a second set of data items from a second data file storing data categorized as personal private information and applying an AI correlation engine to the second set of data items to determine PPI-agnostic relevancy indicators for PPI included in the second set of data items. The method further includes masking, based on the query cluster profile, the second set of data items by replacing the PPI included in the second set of data items with the PPI-agnostic relevancy indicators.
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公开(公告)号：US20220240108A1
公开(公告)日：2022-07-28
申请号：US17657559
申请日：2022-03-31
发明人： Charles R. Ruelke , Hyungjae Cho , KiYoun Cho , Antonio Faraone
摘要： One example Land Mobile Radio (LMR) base station includes a network interface and an electronic processor. The electronic processor is configured to receive profile information of a plurality of fifth generation (5G)/Long Term Evolution (LTE) communication devices. The profile information of the plurality of 5G/LTE communication devices may be transmitted (i) over a background gateway communication channel to an LMR communication network that includes the LMR base station and (ii) in response to the 5G/LTE software defined network detecting a fault condition of the first 5G/LTE communication network. The electronic processor is further configured to broadcast a capture beacon based on the profile information and compliant with at least some characteristics of a 5G/LTE communication protocol. The capture beacon is configured to be received by the 5G/LTE communication device to reconfigure the 5G/LTE communication device for communication compliant with an LMR communication protocol.
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公开(公告)号：US20210182063A1
公开(公告)日：2021-06-17
申请号：US16710862
申请日：2019-12-11
IPC分类号： G06F9/30
摘要： Some example memory systems include a load and store unit (LSU) operable to load a memory reference. The LSU may include an alignment register, a current memory reference register, and a vector register. The memory system may include a memory coupled to the LSU. The memory may be operable to store a memory reference. The memory reference may be aligned or unaligned in the memory, and the LSU may be operable to efficiently load both unaligned and aligned memory references. Some example memory systems include a load and store unit (LSU) operable to store to the memory at a memory address. The LSU may be operable to efficiently store to both unaligned and aligned memory addresses. The LSU may perform loads and stores in forward and reverse stride.
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公开(公告)号：US20210064075A1
公开(公告)日：2021-03-04
申请号：US16557290
申请日：2019-08-30
IPC分类号： G06F1/08 , G06F1/3237 , H03L7/18 , G06F1/324
摘要： Clock distribution network and method for dynamically changing clock frequency in digital processing system are provided. The method includes receiving, at a first clock input of a first divider, a frequency signal from a clock source and receiving, at a state machine, a first status signal from the first divider, the first status signal indicating a first number of clock edges that have transpired from a first phase reference clock edge of the first divider. The method includes asserting, using the state machine, a first hold signal at a first hold input of the first divider, the first hold signal suspending operation of the first divider when asserted and after asserting the first hold signal, latching a new first divider value into the first divider. The method includes de-asserting, using the state machine, the first hold signal subsequent to latching the new first divider value into the first divider.
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5.发明授权公开(公告)号：US10573360B1
公开(公告)日：2020-02-25
申请号：US16204698
申请日：2018-11-29
摘要： A method and apparatus for adaptable phase training of high frequency clock signaling for data capture is provided. A state machine synchronizes a first selection signal to a delay multiplexer and a second selection signal to a digital block demultiplexer to sequentially select a targeted pair of the static storage elements for each of a plurality of phase-delayed data strobe clock signals. Read back data from an external memory captured by the static storage elements is compared to known valid data. The state machine determines which of the plurality of phase-delayed data strobe clock signals resulted in known valid data being captured by the static storage elements based on the comparison. The state machine selects one of the plurality of phase-delayed data strobe clock signals that resulted in valid data being captured as a read clock signal for a memory controller to capture subsequent read data from the external memory.
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公开(公告)号：US20180358980A1
公开(公告)日：2018-12-13
申请号：US15616674
申请日：2017-06-07
CPC分类号： H03M3/488 , H03G3/008 , H03G3/20 , H03G3/3052 , H03G2201/307 , H03M3/492 , H04W52/0238
摘要： A scalable dynamic range analog-to-digital converter. In one instance, a method of scaling a dynamic range of an analog-to-digital converter is provided. The method includes operating the analog-to-digital converter at a first dynamic range. The method also includes receiving a radio frequency signal and detecting an on-channel signal level of the radio frequency signal. The method also includes when the on-channel signal level is above an on-channel threshold, operating the analog-to-digital converter at a second dynamic range. The method also includes when the on-channel signal level is below the on-channel threshold, operating the analog-to-digital converter at the first dynamic range.
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7.发明授权公开(公告)号：US09514066B1
公开(公告)日：2016-12-06
申请号：US14849535
申请日：2015-09-09
CPC分类号： G06F13/102 , G06F13/20 , G06F13/4068
摘要： A real-time reconfigurable input/output interface of a controller and a method of reconfiguring the same. The reconfigurable interface enables the controller to communicate with a plurality of peripheral digital subsystem blocks, and includes an input/output interface, a profile memory, and a state machine. The input/output interface includes a plurality of data lines including a shared portion that are shared among the plurality of peripheral digital subsystem blocks. The profile memory stores a plurality of interface profiles, each interface profile defining a configuration of the input/output interface to communicate with an associated one of the peripheral blocks. The state machine is coupled to the profile memory to receive interface profiles and to the input/output interface. In response to each request to communicate with a particular peripheral block, the state machine configures the input/output interface according to the interface profile associated with the particular peripheral block.
摘要翻译： 控制器的实时可重配置输入/输出接口和重新配置控制器的方法。 可重配置接口使得控制器能够与多个外围数字子系统块进行通信，并且包括输入/输出接口，简档存储器和状态机。 输入/输出接口包括多个数据线，包括在多个外围数字子系统块之间共享的共享部分。 简档存储器存储多个接口配置文件，每个接口配置文件定义了输入/输出接口的配置，以便与相关联的外围块之一进行通信。 状态机耦合到配置文件存储器以接收接口配置文件和输入/输出接口。 响应于与特定外围块通信的每个请求，状态机根据与特定外围块相关联的接口配置来配置输入/输出接口。
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8.发明申请METHOD AND APPARATUS FOR USING ERASURE TO IMPROVE SIGNAL DECODING DURING AN INTERFERENCE EVENT 有权在干扰事件中使用擦除来改善信号解码的方法和装置公开(公告)号：US20150017941A1
公开(公告)日：2015-01-15
申请号：US13938623
申请日：2013-07-10
IPC分类号： H04L1/00
CPC分类号： H04L1/0045 , H04L25/067
摘要： A method and apparatus for using erasure to improve signal decoding when data is impacted by an interference event. Embodiments may include receiving in an RF receiver a desired on-channel signal that includes an information signal modulated on to the desired on-channel signal; generating a sampled received signal with an analog-to-digital (A/D) converter; detecting an interference event using an interference detector as well as generating a mask based on the interference event; processing the sampled received signal using the mask to generate decoding data for use by a soft decoder; and, providing the decoding data to the soft decoder.
摘要翻译： 一种当数据受到干扰事件的影响时，使用擦除来改善信号解码的方法和装置。 实施例可以包括在RF接收机中接收包含被调制到期望的开通信道信号上的信息信号的期望的通道信号; 利用模数（A / D）转换器生成采样的接收信号; 使用干扰检测器检测干扰事件以及基于所述干扰事件生成掩码; 使用掩码处理采样的接收信号以产生解码数据供软解码器使用; 并向软解码器提供解码数据。
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公开(公告)号：US10936006B1
公开(公告)日：2021-03-02
申请号：US16557290
申请日：2019-08-30
IPC分类号： G06F1/08 , G06F1/324 , G06F1/3237
摘要： Clock distribution network and method for dynamically changing clock frequency in digital processing system are provided. The method includes receiving, at a first clock input of a first divider, a frequency signal from a clock source and receiving, at a state machine, a first status signal from the first divider, the first status signal indicating a first number of clock edges that have transpired from a first phase reference clock edge of the first divider. The method includes asserting, using the state machine, a first hold signal at a first hold input of the first divider, the first hold signal suspending operation of the first divider when asserted and after asserting the first hold signal, latching a new first divider value into the first divider. The method includes de-asserting, using the state machine, the first hold signal subsequent to latching the new first divider value into the first divider.
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10.发明授权公开(公告)号：US09001932B2
公开(公告)日：2015-04-07
申请号：US13730924
申请日：2012-12-29
CPC分类号： H04L27/22 , H04L27/3818 , H04N5/46 , H04N21/42638
摘要： A method and apparatus for a receiver system in a receiver that includes at least two front end branches, each branch having its own intermediate frequency (IF) mixer to shift a received signal to an IF. When receiving multiple independent signals, the signals are digitized and the receiver performs a digital complex transform on each signal to obtain the corresponding quadrature component. When receiving a single signal the signal is routed to two mixers that are 90 degrees out of phase to obtain the quadrature signal components in the analog section of the receiver.
摘要翻译： 一种用于接收机中的接收机系统的方法和装置，其包括至少两个前端分支，每个分支具有其自己的中频（IF）混频器，以将接收到的信号移位到IF。 当接收到多个独立信号时，信号被数字化，并且接收机对每个信号执行数字复合变换以获得相应的正交分量。 当接收到单个信号时，信号被路由到相位差为90度的两个混频器，以获得接收机的模拟部分中的正交信号分量。
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