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公开(公告)号：US20230370029A1
公开(公告)日：2023-11-16
申请号：US18359718
申请日：2023-07-26
Applicant: Huawei Technologies Co., Ltd.
Inventor： William Roeckner , Terrie McCain , Matthew Miller
CPC classification number: H03F3/245 , H03F1/56 , H03G3/3036 , H03F2200/294 , H03F2200/451 , H03F2200/255 , H03G2201/103 , H03G2201/307
Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a programmable input impedance circuit for a radio frequency (RF) low noise amplifier (LNA) including a high impedance mode circuit and a low impedance mode circuit. The high impedance mode circuit includes an inductor-degenerated transconductor transistor, an inductor selectively coupled between a source of the inductor-degenerated transconductor transistor and a ground, and a capacitor coupled between a gate of the inductor-degenerated transconductor transistor and the source of the inductor-degenerated transconductor transistor. The low impedance mode circuit includes a shunt resistor selectively coupled between an RF input source and an alternating current (AC) ground.
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公开(公告)号：US20230344396A1
公开(公告)日：2023-10-26
申请号：US18044733
申请日：2021-09-02
Applicant: Sony Semiconductor Solutions Corporation
Inventor： Shinichi Tanabe
CPC classification number: H03G3/3036 , H04B1/16 , H03G2201/103 , H03G2201/307
Abstract: The present technique pertains to a signal processing apparatus, a signal processing method, and a receiving apparatus that enable gain control to be appropriately performed on various interfering signals.
An amplifier controls a gain according to a count value to amplify a signal, and a comparator compares the signal outputted by the amplifier with the count value. An accumulator counts the count value according to an output from the comparator. The present technique can be applied to, for example, a receiving apparatus that receives an RF signal for a television broadcast.-
公开(公告)号：US20230344391A1
公开(公告)日：2023-10-26
申请号：US17726651
申请日：2022-04-22
Applicant: Qorvo US, Inc.
Inventor： Baker Scott , Mihai Murgulescu , George Maxim , Padmmasini Desikan
CPC classification number: H03F3/19 , H03G3/3036 , H03G3/001 , H03F2200/451 , H03F2200/294 , H03G2201/103 , H03G2201/307
Abstract: Disclosed is a low noise amplifier system. Included is a main amplifier having a main input coupled to a RF input and a main output connected to an RF output and an impedance amplifier having an impedance input coupled to the RF input and an impedance output coupled to the RF output, wherein the impedance amplifier is configured to provide input impedance matching to the main amplifier. The impedance amplifier also provides a first noise path that passes through the impedance amplifier such that the noise generated by the impedance amplifier is substantially out of phase with the noise that passes through a second noise path that passes through the main amplifier.
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公开(公告)号：US20230344390A1
公开(公告)日：2023-10-26
申请号：US17660172
申请日：2022-04-21
Applicant: QUALCOMM Incorporated
Inventor： Alaaeldien Mohamed Abdelrazek Medra , Xinmin Yu , Yunfei Feng
CPC classification number: H03F3/19 , H03G3/3036 , H04B1/04 , H03F2200/294 , H03F2200/451 , H03G2201/103 , H03G2201/307
Abstract: This disclosure provides systems, methods, and devices for wireless communication that support low noise amplification of mmWave radio frequency (RF) signals. In a first aspect, a low noise amplifier includes a first stage amplifier; a second stage amplifier; a configurable first stage bypass coupled between a first input and a first output of the first stage amplifier; and a configurable second stage bypass coupled between a second input and a second output of the second stage amplifier. Other aspects and features are also claimed and described.
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公开(公告)号：US11722125B2
公开(公告)日：2023-08-08
申请号：US18087052
申请日：2022-12-22
Applicant: Reach Power, Inc.
Inventor： Asmita Dani , Christopher Joseph Davlantes
CPC classification number: H03K3/012 , H02M7/217 , H03F3/19 , H03G3/3036 , H03F2200/451 , H03G2201/103 , H03G2201/307
Abstract: A bidirectional RF circuit, preferably including a plurality of terminals, a switch, a transistor, a coupler, and a feedback network. The circuit can optionally include a drain matching network, an input matching network, and/or one or more tuning inputs. In some variations, the circuit can optionally include one or more impedance networks, such as an impedance network used in place of the feedback network; in some such variations, the circuit may not include a coupler, switch, and/or input matching network. A method for circuit operation, preferably including operating in an amplifier mode, operating in a rectifier mode, and/or transitioning between operation modes.
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Patent Agency Ranking
公开(公告)号：US20230231522A1
公开(公告)日：2023-07-20
申请号：US17580128
申请日：2022-01-20
Applicant: Apple Inc.
Inventor： Nitesh Singhal , Mark G. Forbes
CPC classification number: H03F3/19 , H03G3/3036 , H04B1/04 , H03F2200/451 , H03G2201/103 , H03G2201/307 , H04B1/40
Abstract: An electronic device may include wireless circuitry with a processor, a transceiver, an antenna, and a front-end module coupled between the transceiver and the antenna. The front-end module may include one or more radio-frequency amplifiers for amplifying a radio-frequency signal. The radio-frequency amplifier may include input transistors cross-coupled with capacitance neutralization transistors and/or coupled to cascode transistors. One or more n-type gain adjustment transistors may be coupled to source terminals of the capacitance neutralization transistors. One or more p-type gain adjustment transistors may be coupled to source terminals of the cascode transistors. One or more processors in the electronic device can selectively activate one or more of the gain adjustment transistors to reduce the gain of the radio-frequency amplifier without degrading noise performance and without altering the in-band frequency response of the radio-frequency amplifier.
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公开(公告)号：US20230208455A1
公开(公告)日：2023-06-29
申请号：US18146611
申请日：2022-12-27
Applicant: Skyworks Solutions, Inc.
Inventor： Dominique Michel Yves Brunel , Gregory Edward Babcock
CPC classification number: H04B1/04 , H03F3/245 , H01Q9/0407 , H03G3/3042 , H03F2200/451 , H03G2201/103 , H03G2201/307
Abstract: Polyphase power amplifiers for load insensitivity are disclosed. In certain embodiments, a polyphase transmit system includes an intermediate frequency transceiver including a first complex mixer that outputs a plurality of intermediate frequency transmit signals of different phases, and an intermediate frequency to radio frequency module including a second complex mixer that generates a plurality of radio frequency transmit signals of different phases based on the plurality of intermediate frequency transmit signals, and a polyphase power amplifier that receives the plurality of radio frequency transmit signals and outputs an amplified radio frequency signal. The polyphase transmit system further includes an antenna that transmits the amplified radio frequency signal.
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公开(公告)号：US20230198507A1
公开(公告)日：2023-06-22
申请号：US18087052
申请日：2022-12-22
Applicant: Reach Power, Inc.
Inventor： Asmita Dani , Christopher Joseph Davlantes
CPC classification number: H03K3/012 , H02M7/217 , H03F3/19 , H03G3/3036 , H03F2200/451 , H03G2201/103 , H03G2201/307
Abstract: A bidirectional RF circuit, preferably including a plurality of terminals, a switch, a transistor, a coupler, and a feedback network. The circuit can optionally include a drain matching network, an input matching network, and/or one or more tuning inputs. In some variations, the circuit can optionally include one or more impedance networks, such as an impedance network used in place of the feedback network; in some such variations, the circuit may not include a coupler, switch, and/or input matching network. A method for circuit operation, preferably including operating in an amplifier mode, operating in a rectifier mode, and/or transitioning between operation modes.
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公开(公告)号：US20230170861A1
公开(公告)日：2023-06-01
申请号：US18057597
申请日：2022-11-21
Applicant: Analog Devices, Inc.
Inventor： Christopher J. DAY
CPC classification number: H03F3/245 , H03G3/3042 , H03F2200/129 , H03F2200/451 , H03G2201/103 , H03G2201/307
Abstract: Systems and methods that integrate a directional coupling function with directivity that does not have output loss are disclosed. For example, a power amplifier circuit arrangement includes an input terminal to receive an input signal; amplifier circuitry including a first amplifier stage, a second amplifier stage, and a virtual ground node, where an input of the first amplifier stage is coupled to the input terminal, an output of the first amplifier stage is coupled to an input of the second amplifier stage via the virtual ground node, and an output of the second amplifier stage is coupled to the input of the first amplifier stage via feedback circuitry; an output terminal coupled to the output of the second amplifier stage, the output terminal to output an amplified signal; and a directional coupler terminal coupled to the virtual ground node.
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公开(公告)号：US20180083579A1
公开(公告)日：2018-03-22
申请号：US15272103
申请日：2016-09-21
Applicant: Peregrine Semiconductor Corporation
Inventor： Hossein Noori , Chih-Chieh Cheng
CPC classification number: H03F1/3205 , H03F1/56 , H03F3/195 , H03F3/72 , H03F2200/18 , H03F2200/21 , H03F2200/211 , H03F2200/213 , H03F2200/222 , H03F2200/225 , H03F2200/24 , H03F2200/243 , H03F2200/249 , H03F2200/27 , H03F2200/294 , H03F2200/297 , H03F2200/301 , H03F2200/306 , H03F2200/312 , H03F2200/387 , H03F2200/391 , H03F2200/399 , H03F2200/417 , H03F2200/451 , H03F2200/48 , H03F2200/489 , H03F2200/492 , H03F2200/495 , H03F2200/546 , H03F2200/72 , H03F2200/75 , H03G1/0029 , H03G1/0088 , H03G1/0094 , H03G3/001 , H03G3/008 , H03G3/10 , H03G2201/106 , H03G2201/307 , H03G2201/504
Abstract: A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” input stage and a “common gate” output stage can be turned on or off using the gate of the output stage. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input stage of each cascode. Further switches used for switching degeneration inductors, gate/sources caps and gate to ground caps for each legs can be used to further improve the matching performance of the invention.
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