公开(公告)号：US09257992B2

公开(公告)日：2016-02-09

申请号：US14300377

申请日：2014-06-10

Applicant: MStar Semiconductor, Inc.

Inventor： Chih-Ming Hung ,  Yueh-Ting Lee ,  Cheng-Chieh Lin ,  Yao-Chi Wang ,  Shih-Chieh Yen

IPC: H03L1/00 ,  H03B5/36

CPC classification number: H03L1/00 ,  H03B5/36 ,  H03B2201/0208

Abstract: A communication device is provided in the present invention. The communication device comprises an oscillation signal source, a tunable capacitor array, a frame counter; and a control module. The control module is configured to jointly or separately control the tunable capacitor array and the frame counter to compensate a first frequency offset of the oscillation signal source when the communication device operates in a first mode, and to jointly or separately control the tunable capacitor array and the frame counter to compensate a second frequency offset of the oscillation signal source when the communication device operates in a second mode.

Abstract translation: 本发明提供一种通信装置。 通信装置包括振荡信号源，可调谐电容器阵列，帧计数器; 和控制模块。 控制模块被配置为联合或单独地控制可调谐电容器阵列和帧计数器，以在通信设备以第一模式操作时补偿振荡信号源的第一频率偏移，并且共同地或单独地控制可调电容器阵列和 所述帧计数器在所述通信设备在第二模式下操作时补偿所述振荡信号源的第二频率偏移。

公开(公告)号：US08810286B1

公开(公告)日：2014-08-19

申请号：US13875829

申请日：2013-05-02

Applicant: MStar Semiconductor, Inc.

Inventor： Khurram Muhammad ,  Chih-Ming Hung

IPC: H03K19/082 ,  H03K19/094 ,  H03L7/16

CPC classification number: H03L7/16

Abstract: Direct digital frequency synthesis is the process by which a digital frequency synthesizer component may output a stable, precise clock frequency at any of a broad range of possible frequency output values for any number of applications, usually across an integrated circuit. The digital frequency synthesizer set forth in this disclosure is a combination of a controller configured to receive a frequency control word and generate a first frequency control sub-word and a second frequency control sub-word based on the frequency control word, a frequency generator configured to generate a source frequency within a first predetermined frequency range based on the first frequency control sub-word, and a variable frequency divider configured to generate an output frequency within a second predetermined range based on the second frequency control sub-word and the source frequency.

Abstract translation: 直接数字频率合成是数字频率合成器组件可以在通常跨集成电路的任何数量的应用的可能的频率输出值的任何范围内输出稳定，精确的时钟频率的过程。 本公开中提出的数字频率合成器是被配置为接收频率控制字并基于频率控制字产生第一频率控制子字和第二频率控制子字的控制器的组合，频率发生器被配置 基于第一频率控制子字，在第一预定频率范围内产生源频率，以及可变分频器，其被配置为基于第二频率控制子字和源频率在第二预定范围内生成输出频率 。

公开(公告)号：US20150195110A1

公开(公告)日：2015-07-09

申请号：US14591559

申请日：2015-01-07

Applicant: MStar Semiconductor, Inc.

Inventor： Jun-Xiong Deng ,  Chih-Ming Hung

IPC: H04L25/08 ,  H03F3/19 ,  H03F1/32

CPC classification number: H04L25/08 ,  H03F1/3241 ,  H03F1/3258 ,  H03F1/3282 ,  H03F3/19 ,  H03F2200/451 ,  H03F2201/3215 ,  H04L25/03343

Abstract: A method for signal processing is provided. The method includes: obtaining a predistortion signal for compensating nonlinear distortion generated by a transmission path; adding the predistortion signal to the transmission path to compensate the nonlinear distortion; and outputting the nonlinear distortion compensated signal by the transmission path. With the above method, the nonlinear distortion of the transmission path can be compensated without modifying a current transmission path, thereby enhancing transmission performance of a transmitter by using a simple structure.

Abstract translation: 提供了一种用于信号处理的方法。 该方法包括：获得用于补偿由传输路径产生的非线性失真的预失真信号; 将预失真信号加到传输路径上以补偿非线性失真; 并通过传输路径输出非线性失真补偿信号。 利用上述方法，可以在不修改当前传输路径的情况下补偿传输路径的非线性失真，从而通过简单的结构提高发射机的传输性能。

公开(公告)号：US08922260B2

公开(公告)日：2014-12-30

申请号：US13875706

申请日：2013-05-02

Applicant: MStar Semiconductor, Inc.

Inventor： Khurram Muhammad ,  Chih-Ming Hung

IPC: H03B19/00 ,  H03K3/012

CPC classification number: H03K21/00 ,  H03K5/04 ,  H03K21/023

Abstract: A dual-edge triggered variable frequency divider for use in digital frequency synthesis is disclosed. The variable frequency divider utilizes a multiphase clock and a logic unit, including both positive and negative edge triggered unit delay elements connected in parallel. The variable frequency divider generates a clock pulse from a signal source that corresponds to an input value from a logic unit, generates a next input value by the logic unit based on the input value and a frequency control word, and transmits the next input value from the logic unit to the signal source in response to the clock pulse. The multiphase clock is configured to generate the clock signal in response to the falling edge of the first pulse of the clock signal. Iteratively selecting signals by this process results in an observed output frequency of fout=N*fsrc/D, where fsrc is the input signal frequency, N is the number of phases of the multi-phase (N-phase) clock, and D is an integer between 1 and N configured by the frequency control word.

Abstract translation: 公开了一种用于数字频率合成的双边缘触发可变分频器。 可变分频器利用多相时钟和逻辑单元，包括并联连接的正沿和负沿触发单元延迟元件。 可变分频器从对应于来自逻辑单元的输入值的信号源产生时钟脉冲，基于输入值和频率控制字由逻辑单元生成下一个输入值，并将下一个输入值从 逻辑单元响应时钟脉冲信号源。 多相时钟被配置为响应于时钟信号的第一脉冲的下降沿而产生时钟信号。 通过该处理迭代选择信号导致fout = N * fsrc / D的观测输出频率，其中fsrc是输入信号频率，N是多相（N相）时钟的相数，D是 由频率控制字配置的1和N之间的整数。

公开(公告)号：US08866523B2

公开(公告)日：2014-10-21

申请号：US13872287

申请日：2013-04-29

Applicant: MStar Semiconductor, Inc.

Inventor： Ming-Yu Hsieh ,  Sheng-Che Tseng ,  Chih-Ming Hung

IPC: H03L7/00

CPC classification number: H03L7/00 ,  H03L7/0814 ,  H03L7/0818

Abstract: An edge alignment apparatus includes: a signal source, for generating a first and a second square wave signals; a phase delay circuit, for receiving the first and the second square wave signals to generate a delayed first and a delayed second square wave signals; a data circuit, for generating a third square wave signal according to the delayed second square wave signal; and a phase calibrating circuit, for receiving the third square wave signal and the delayed first squared wave signal to generate at least one phase tuning signal to the phase delay circuit for tuning a phase difference between the delayed first and the delayed second square wave signals, such that a signal edge of the third square wave signal aligns with that of the first square wave signal. The first, second and third square wave signals have a same frequency.

Abstract translation: 边缘对准装置包括：用于产生第一和第二方波信号的信号源; 相位延迟电路，用于接收第一和第二方波信号以产生延迟的第一和延迟的第二方波信号; 数据电路，用于根据延迟的第二方波信号产生第三方波信号; 以及相位校准电路，用于接收第三方波信号和延迟的第一平方波信号，以向相位延迟电路产生至少一个相位调谐信号，以调谐延迟的第一和延迟的第二方波信号之间的相位差， 使得第三方波信号的信号边缘与第一方波信号的信号边缘对准。 第一，第二和第三方波信号具有相同的频率。

公开(公告)号：US08824594B2

公开(公告)日：2014-09-02

申请号：US13668470

申请日：2012-11-05

Applicant: MStar Semiconductor, Inc.

Inventor： Dennis Mahoney ,  Chih-Ming Hung

IPC: H04K1/02

CPC classification number: H04L27/206 ,  H04L25/03343 ,  H04L27/362 ,  H04L27/367

Abstract: Amplitude-modulation (AM) to AM (AMAM) predistortion data is obtained from an AMAM predistorter. When applied to a digital quadrature signal, the AMAM predistortion data predistorts in-phase (I) and quadrature (Q) data words in a digital quadrature modulator. AM to phase-modulation (AMPM) predistortion data is obtained that is associated with the AMAM predistortion data and a frequency change or a phase shift in a local oscillator (LO) signal is compelled in accordance with the AMPM predistortion data. The frequency-changed or phase-shifted LO signal is provided to a digital upconverter such that an output signal of the digital upconverter is linearized with respect to at least phase distortion in the digital upconverter.

Abstract translation: 从AMAM预失真器获得幅度调制（AM）到AM（AMAM）预失真数据。 当应用于数字正交信号时，AMAM预失真数据在数字正交调制器中预调制同相（I）和正交（Q）数据字。 获得与AMAM预失真数据相关的AM到相位调制（AMPM）预失真数据，并且根据AMPM预失真数据强制本地振荡器（LO）信号中的频率变化或相移。 频率变化或相移的LO信号被提供给数字上变频器，使得数字上变频器的输出信号相对于数字上变频器中的至少相位失真被线性化。

公开(公告)号：US09184955B2

公开(公告)日：2015-11-10

申请号：US14591559

申请日：2015-01-07

Applicant: MStar Semiconductor, Inc.

Inventor： Jun-Xiong Deng ,  Chih-Ming Hung

IPC: H04L25/08 ,  H03F1/32 ,  H03F3/19

CPC classification number: H04L25/08 ,  H03F1/3241 ,  H03F1/3258 ,  H03F1/3282 ,  H03F3/19 ,  H03F2200/451 ,  H03F2201/3215 ,  H04L25/03343

Abstract: A method for signal processing is provided. The method includes: obtaining a predistortion signal for compensating nonlinear distortion generated by a transmission path; adding the predistortion signal to the transmission path to compensate the nonlinear distortion; and outputting the nonlinear distortion compensated signal by the transmission path. With the above method, the nonlinear distortion of the transmission path can be compensated without modifying a current transmission path, thereby enhancing transmission performance of a transmitter by using a simple structure.

Abstract translation: 提供了一种用于信号处理的方法。 该方法包括：获得用于补偿由传输路径产生的非线性失真的预失真信号; 将预失真信号加到传输路径上以补偿非线性失真; 并通过传输路径输出非线性失真补偿信号。 利用上述方法，可以在不修改当前传输路径的情况下补偿传输路径的非线性失真，从而通过简单的结构提高发射机的传输性能。

公开(公告)号：US20140365841A1

公开(公告)日：2014-12-11

申请号：US14273985

申请日：2014-05-09

Applicant: MStar Semiconductor, Inc.

Inventor： Shih-Chieh Yen ,  Chih-Ming Hung

IPC: G01R31/3177

CPC classification number: G01R31/31715 ,  G01R31/2822 ,  H04B17/0085

Abstract: A signal processing system includes a module under test, an oscillation signal generator, a translational filter, and a testing module. The module under test has a signal input end. The oscillation signal generator generates an oscillation signal. The translational filter includes a mixer controlled by the oscillation signals. The mixer has a high-frequency side and a low-frequency side. The high-frequency side is coupled to the signal input end of the module under test. The testing module is coupled to the low-frequency side of the mixer. When the signal processing system is in a testing mode, the testing module provides a testing signal to the low-frequency side, so as to generate a high-frequency testing signal at the high-frequency side of the mixer.

Abstract translation: 信号处理系统包括被测模块，振荡信号发生器，平移滤波器和测试模块。 被测模块有一个信号输入端。 振荡信号发生器产生振荡信号。 平移滤波器包括由振荡信号控制的混频器。 混频器具有高频侧和低频侧。 高频侧耦合到被测模块的信号输入端。 测试模块耦合到混频器的低频侧。 当信号处理系统处于测试模式时，测试模块向低频侧提供测试信号，以便在混频器的高频侧产生高频测试信号。

公开(公告)号：US20140361846A1

公开(公告)日：2014-12-11

申请号：US14300377

申请日：2014-06-10

Applicant: MStar Semiconductor, Inc.

Inventor： Chih-Ming Hung ,  Yueh-Ting Lee ,  Cheng-Chieh Lin ,  Yao-Chi Wang ,  Shih-Chieh Yen

IPC: H03L1/00 ,  H03B5/08

CPC classification number: H03L1/00 ,  H03B5/36 ,  H03B2201/0208

Abstract: A communication device is provided in the present invention. The communication device comprises an oscillation signal source, a tunable capacitor array, a frame counter; and a control module. The control module is configured to jointly or separately control the tunable capacitor array and the frame counter to compensate a first frequency offset of the oscillation signal source when the communication device operates in a first mode, and to jointly or separately control the tunable capacitor array and the frame counter to compensate a second frequency offset of the oscillation signal source when the communication device operates in a second mode.

Abstract translation: 本发明提供一种通信装置。 通信装置包括振荡信号源，可调谐电容器阵列，帧计数器; 和控制模块。 控制模块被配置为联合或单独地控制可调谐电容器阵列和帧计数器，以在通信设备以第一模式操作时补偿振荡信号源的第一频率偏移，并且共同地或单独地控制可调电容器阵列和 所述帧计数器在所述通信设备在第二模式下操作时补偿所述振荡信号源的第二频率偏移。

公开(公告)号：US20130300478A1

公开(公告)日：2013-11-14

申请号：US13872287

申请日：2013-04-29

Applicant: MSTAR SEMICONDUCTOR, INC.

Inventor： Ming-Yu Hsieh ,  Sheng-Che Tseng ,  Chih-Ming Hung

IPC: H03L7/00

CPC classification number: H03L7/00 ,  H03L7/0814 ,  H03L7/0818

Abstract: An edge alignment apparatus includes: a signal source, for generating a first and a second square wave signals; a phase delay circuit, for receiving the first and the second square wave signals to generate a delayed first and a delayed second square wave signals; a data circuit, for generating a third square wave signal according to the delayed second square wave signal; and a phase calibrating circuit, for receiving the third square wave signal and the delayed first squared wave signal to generate at least one phase tuning signal to the phase delay circuit for tuning a phase difference between the delayed first and the delayed second square wave signals, such that a signal edge of the third square wave signal aligns with that of the first square wave signal. The first, second and third square wave signals have a same frequency.

Abstract translation: 边缘对准装置包括：信号源，用于产生第一和第二方波信号; 相位延迟电路，用于接收第一和第二方波信号以产生延迟的第一和延迟的第二方波信号; 数据电路，用于根据延迟的第二方波信号产生第三方波信号; 以及相位校准电路，用于接收第三方波信号和延迟的第一平方波信号，以向相位延迟电路产生至少一个相位调谐信号，以调谐延迟的第一和延迟的第二方波信号之间的相位差， 使得第三方波信号的信号边缘与第一方波信号的信号边缘对准。 第一，第二和第三方波信号具有相同的频率。