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公开(公告)号:US11152458B2
公开(公告)日:2021-10-19
申请号:US16784292
申请日:2020-02-07
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Chung-Kuang Chen , Chia-Ching Li , Chien-Fu Huang , Chia-Ming Hu
IPC: H01L49/02 , H01L23/522 , H01G4/232 , H01L27/06
Abstract: A metal capacitor provided includes a first metal layer and a second metal layer disposed above a substrate. The first metal layer includes a first electrode sheet and a second electrode sheet, and the second metal layer includes a third electrode sheet and a fourth electrode sheet. The first electrode sheet and the second electrode sheet collectively form a first coplanar capacitor. The third electrode sheet and the fourth electrode sheet collectively form a second coplanar capacitor. At least a portion of the fourth electrode sheet is arranged above the first electrode sheet, and the first electrode sheet and the fourth electrode sheet collectively form a first vertical capacitor. At least a portion of the third electrode sheet is arranged above the second electrode sheet, and the second electrode sheet and the third electrode sheet collectively form a second vertical capacitor.
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公开(公告)号:US12061125B2
公开(公告)日:2024-08-13
申请号:US17011864
申请日:2020-09-03
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Chia-Ming Hu , Chung-Kuang Chen , Chia-Ching Li , Chien-Fu Huang
Abstract: An integrated circuit includes a memory and peripheral circuits with a temperature sensor used to automatically adjust operating voltages. The temperature sensor includes a reference circuit that generates a first reference with a first non-zero temperature coefficient and a second reference with a second temperature coefficient having a different magnitude than the first non-zero temperature coefficient. A detector circuit on the integrated circuit, having temperature and process variation compensation, converts a difference between the first and second references into a digital signal indicating temperature on the integrated circuit.
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公开(公告)号:US11710763B2
公开(公告)日:2023-07-25
申请号:US17471216
申请日:2021-09-10
Applicant: MACRONIX INTERNATIONAL CO., LTD.
Inventor: Chung-Kuang Chen , Chia-Ching Li , Chien-Fu Huang , Chia-Ming Hu
CPC classification number: H01L28/86 , H01G4/012 , H01G4/232 , H01G4/30 , H01G4/33 , H01G4/38 , H01L23/5222 , H01L23/5223 , H01L27/0629
Abstract: A metal capacitor provided includes a first metal layer and a second metal layer disposed above a substrate. The first metal layer includes a first electrode sheet and a second electrode sheet, and the second metal layer includes a third electrode sheet and a fourth electrode sheet. The first electrode sheet and the second electrode sheet collectively form a first coplanar capacitor. The third electrode sheet and the fourth electrode sheet collectively form a second coplanar capacitor. At least a portion of the fourth electrode sheet is arranged above the first electrode sheet, and the first electrode sheet and the fourth electrode sheet collectively form a first vertical capacitor. At least a portion of the third electrode sheet is arranged above the second electrode sheet, and the second electrode sheet and the third electrode sheet collectively form a second vertical capacitor.
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公开(公告)号:US20190279726A1
公开(公告)日:2019-09-12
申请号:US15917037
申请日:2018-03-09
Applicant: Macronix International Co., Ltd.
Inventor: Chia-Ching Li , Yi-Ching Liu
IPC: G11C16/28 , G11C16/04 , G11C11/408 , G11C11/4099 , G06F12/02
Abstract: A memory device comprising: a memory cell array and a memory controller configured to program data to memory cells during a programming cycle using operations comprising: during a setup stage, providing a first voltage level to word lines, a second voltage level to a first dummy word line, and a fourth voltage level to second dummy word lines being different from the first dummy word line, wherein the first voltage level is lower than a threshold voltage of a first transistor coupled to the first dummy word line and the second voltage level and the fourth voltage are higher than the threshold voltage, during a program stage, providing a third voltage level to first word lines to program data to memory cells coupled to the first word lines, the second voltage level to the first dummy word line, and the fourth voltage level to the second dummy word lines.
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公开(公告)号:US09146569B2
公开(公告)日:2015-09-29
申请号:US13862963
申请日:2013-04-15
Applicant: Macronix International Co., Ltd.
Inventor: Chia-Ching Li , Hsien-Hung Wu , Hsin-Yi Ho , Han-Sung Chen , Chun-Hsiung Hung , Tzung-Shen Chen
CPC classification number: G05F1/565
Abstract: A regulator comprises an amplifier, a bias circuit, and a current trimming circuit. The bias circuit is coupled to the amplifier and supplies a first bias current to the amplifier in a first mode of a system including the regulator. The current trimming circuit is coupled to the bias circuit to adjust the first bias current.
Abstract translation: 调节器包括放大器,偏置电路和电流微调电路。 偏置电路耦合到放大器并且在包括调节器的系统的第一模式中向放大器提供第一偏置电流。 电流微调电路耦合到偏置电路以调节第一偏置电流。
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