公开(公告)号：US12224038B2

公开(公告)日：2025-02-11

申请号：US18191903

申请日：2023-03-29

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Kuan-Chih Chen ,  Chia-Hong Lee ,  Ming-Hsiu Lee

IPC: G11C11/409 ,  G11C7/10 ,  G11C11/54

Abstract: A memory device and an intelligent operation method thereof are provided. The memory device includes a memory array, a signal generating circuit, an environment detecting circuit and an artificial intelligence (AI) circuit. The signal generating circuit is configured to generate an inputting signal. The environment detecting circuit is configured to detect at least one environment information. The AI circuit is connected among the memory array, the signal generating circuit and the environment detecting circuit. The AI circuit at least receives the inputting signal from the signal generating circuit, receives the environment information from the environment detecting circuit, receives a first performance information from the memory array, receives a second performance information from the AI circuit and outputs an ideal signal to the memory array according to the inputting signal, the environment information, the first performance information and the second performance information.

公开(公告)号：US20160020295A1

公开(公告)日：2016-01-21

申请号：US14334325

申请日：2014-07-17

Applicant: Macronix International Co., Ltd.

Inventor： Kuan-Chih Chen ,  Cheng-Wei Lin ,  Kuang-Wen Liu

IPC: H01L29/45 ,  H01L29/16 ,  H01L21/283 ,  H01L29/04

CPC classification number: H01L21/76889 ,  H01L21/26506 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53266 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/456 ,  H01L29/66833 ,  H01L29/792

Abstract: Provided are improved semiconductor memory devices and method for manufacturing such semiconductor memory devices. A method may incorporate the formation of silicide regions in a semiconductor. The method may allow for a semiconductor with a silicide layer with improved resistance and reduced silicide bridge formation.

Abstract translation: 提供了用于制造这种半导体存储器件的改进的半导体存储器件和方法。 一种方法可以包括在半导体中形成硅化物区域。 该方法可以允许具有改善的电阻和减少的硅化物桥形成的具有硅化物层的半导体。

公开(公告)号：US20160247719A1

公开(公告)日：2016-08-25

申请号：US15146187

申请日：2016-05-04

Applicant: Macronix International Co., Ltd.

Inventor： Kuan-Chih Chen ,  Cheng-Wei Lin ,  Kuang-Wen Liu

IPC: H01L21/768 ,  H01L23/528 ,  H01L29/66 ,  H01L23/522 ,  H01L29/792 ,  H01L21/28 ,  H01L23/532

CPC classification number: H01L21/76889 ,  H01L21/26506 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53266 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/456 ,  H01L29/66833 ,  H01L29/792

Abstract: Provided are improved semiconductor memory devices and method for manufacturing such semiconductor memory devices. A method may incorporate the formation of silicide regions in a semiconductor. The method may allow for a semiconductor with a silicide layer with improved resistance and reduced silicide bridge formation.

Abstract translation: 提供了用于制造这种半导体存储器件的改进的半导体存储器件和方法。 一种方法可以包括在半导体中形成硅化物区域。 该方法可以允许具有改善的电阻和减少的硅化物桥形成的具有硅化物层的半导体。