摘要:
The present inventors have devised one or more systems, methods, and software for distributed loading of information retrieval systems. One exemplary system includes two or more (at least two) load monitor servers that not only monitor and ensure completion of load tasks by individual load servers in a set of two or more load servers, but also provide for one load monitor to monitor performance of the another. Moreover, the exemplary system provides a service-level-agreement (SLA) data structure for each load server. The SLA data structure governs what types and priority levels of loading tasks will be performed for predetermined time periods.
摘要:
An exception handling system is used, in an exemplary embodiment, to provide exception handling for prefetched instruction bytes in a pipelined 486-type microprocessor. The microprocessor includes a prefetch unit (22) that controls the loading of a prefetch queue (24), including appending a valid bit to each prefetched instruction byte--this valid bit is conventionally used to notify an instruction decoder (26) that a transferred instruction byte is not valid (such as resulting from a change of flow), causing the decoder to signal a stall condition. According to the exception handling technique of the invention, if the prefetch unit detects that any of a selected number of exception conditions (such as limit violations and page faults) applies to a prefetched instruction byte, it invalidates that instruction byte by clearing the valid bit. When an invalid instruction byte is decoded, the decoder asserts a stall condition that can result from either: (a) the prefetch queue is invalid due to instruction bytes being unavailable or flushing in response to a branch, or (b) an exception condition. An exception processor (30) performs two basic functions: (a) monitoring the prefetch unit, and for any instruction byte for which a potential exception condition exists, storing in an exception status register the associated exception status information (for example, limit violation or page fault), and (b) monitoring the decoder to detect stall conditions. For each stall condition detected, the exception processor checks the exception status register for valid exception status information--if so, it invokes the appropriate exception handling routine. Thus, exception handling occurs at decode time, rather than after execution (requiring instruction abort and side effect handling).
摘要:
A power management method for a pipelined computer system in accordance with one or both of a power management signal and a power management instruction.
摘要:
A system and a method providing for the distribution and management of a large corpus of value added electronic documents while providing customized services to a plurality of diverse end users.
摘要:
A signal-initiated power management method for a pipelined data processor by which a clock signal to pipeline subcircuitry is selectively disabled in response to at least one control signal.
摘要:
Power consumption reduction control circuitry external and coupled to a processor used to execute instructions for data processing. A power management control signal is provided to the processor in accordance with conditions associated with the processor being operated in normal and reduced power consumption modes of operation, and an acknowledgement signal indicative of such reduced power consumption mode of operation is returned in correspondence with the power management control signal.
摘要:
A microprocessor comprises a plurality of instruction pipelines having a plurality of stages for processing a stream of instructions, circuitry for simultaneously issuing instructions into two or more of the pipelines without regard to whether one of the simultaneously issued instructions has a data dependency on other of the simultaneously issued instructions, detecting circuitry for detecting dependencies between instructions in the pipelines and circuitry for controlling the flow of instructions through the pipelines such that an instruction is not delayed due to a data dependency on another instruction unless the data dependency must be resolved for proper processing of the instruction in its current stage.
摘要:
An instruction-initiated power management method for a pipelined data processor by which a clock signal to pipeline subcircuitry is selectively disabled in response to an instruction executed by the pipeline subcircuitry.
摘要:
Systems, methods, and software for providing a distributed search function for online delivery platforms used in law firms and other enterprises are described. For example, one aspect of the systems, methods and software provides a plurality of data sets. The data sets may comprise indices into other sets of data. At least one search engine is associated with each data set. A system receiving a search request determines which search engines are used to process the search request based on the data sets involved in the search request. The search request is then forwarded to the identified search engines.
摘要:
In accordance with the presently claimed invention, power consumption reduction control is provided to a processor used to execute instructions for data processing. A power management control signal is provided to the processor in accordance with conditions associated with the processor being operated in normal and reduced power consumption modes of operation, and an acknowledgement signal indicative of such reduced power consumption mode of operation is returned in correspondence with the power management control signal.