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公开(公告)号:US20080203480A1
公开(公告)日:2008-08-28
申请号:US11678455
申请日:2007-02-23
申请人: Martin Stiftinger , Snezana Jenei , Wolfgang Werner , Uwe Hodel
发明人: Martin Stiftinger , Snezana Jenei , Wolfgang Werner , Uwe Hodel
IPC分类号: H01L29/78 , H01L21/336
CPC分类号: H01L29/0634 , H01L29/0847 , H01L29/66659 , H01L29/7835
摘要: In an embodiment, an apparatus includes a source region, a gate region and a drain region supported by a substrate, and a drift region including a plurality of vertically extending n-wells and p-wells to couple the gate region and the drain region of a transistor, wherein the plurality of n-wells and p-wells are formed in alternating longitudinal rows to form a superjunction drift region longitudinally extending between the gate region and the drain region of the transistor.
摘要翻译: 在一个实施例中,一种装置包括源极区域,栅极区域和由衬底支撑的漏极区域,以及漂移区域,包括多个垂直延伸的n阱阱和p阱以将栅极区域和漏极区域耦合 晶体管,其中所述多个n阱和p阱以交替的纵向行形成,以形成在晶体管的栅极区域和漏极区域之间纵向延伸的超结漂移区域。
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公开(公告)号:US08587055B2
公开(公告)日:2013-11-19
申请号:US11678455
申请日:2007-02-23
申请人: Martin Stiftinger , Snezana Jenei , Wolfgang Werner , Uwe Hodel
发明人: Martin Stiftinger , Snezana Jenei , Wolfgang Werner , Uwe Hodel
IPC分类号: H01L29/66
CPC分类号: H01L29/0634 , H01L29/0847 , H01L29/66659 , H01L29/7835
摘要: In an embodiment, an apparatus includes a source region, a gate region and a drain region supported by a substrate, and a drift region including a plurality of vertically extending n-wells and p-wells to couple the gate region and the drain region of a transistor, wherein the plurality of n-wells and p-wells are formed in alternating longitudinal rows to form a superjunction drift region longitudinally extending between the gate region and the drain region of the transistor.
摘要翻译: 在一个实施例中,一种装置包括源极区域,栅极区域和由衬底支撑的漏极区域,以及漂移区域,包括多个垂直延伸的n阱阱和p阱以将栅极区域和漏极区域耦合 晶体管,其中所述多个n阱和p阱以交替的纵向行形成,以形成在晶体管的栅极区域和漏极区域之间纵向延伸的超结漂移区域。
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公开(公告)号:US20100203703A1
公开(公告)日:2010-08-12
申请号:US12702368
申请日:2010-02-09
申请人: Armin Tilke , Danny Pak-Chum Shum , Laura Pescini , Ronald Kakoschke , Karl Robert Strenz , Martin Stiftinger
发明人: Armin Tilke , Danny Pak-Chum Shum , Laura Pescini , Ronald Kakoschke , Karl Robert Strenz , Martin Stiftinger
IPC分类号: H01L21/762
CPC分类号: H01L27/11526 , H01L21/76224 , H01L27/105 , H01L27/11521 , H01L27/11546
摘要: Deep trench isolation structures and methods of formation thereof are disclosed. Several methods of and structures for increasing the threshold voltage of a parasitic transistor formed proximate deep trench isolation structures are described, including implanting a channel stop region into the bottom surface of the deep trench isolation structures, partially filling a bottom portion of the deep trench isolation structures with an insulating material, and/or filling at least a portion of the deep trench isolation structures with a doped polysilicon material.
摘要翻译: 公开了深沟槽隔离结构及其形成方法。 描述了用于增加形成在深沟槽隔离结构附近的寄生晶体管的阈值电压的几种方法和结构,包括将沟道阻挡区域注入深沟槽隔离结构的底表面,部分地填充深沟槽隔离的底部 具有绝缘材料的结构,和/或用掺杂的多晶硅材料填充至少一部分深沟槽隔离结构。
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公开(公告)号:US08258028B2
公开(公告)日:2012-09-04
申请号:US12702368
申请日:2010-02-09
申请人: Armin Tilke , Danny Pak-Chum Shum , Laura Pescini , Ronald Kakoschke , Karl Robert Strenz , Martin Stiftinger
发明人: Armin Tilke , Danny Pak-Chum Shum , Laura Pescini , Ronald Kakoschke , Karl Robert Strenz , Martin Stiftinger
IPC分类号: H01L21/763
CPC分类号: H01L27/11526 , H01L21/76224 , H01L27/105 , H01L27/11521 , H01L27/11546
摘要: Deep trench isolation structures and methods of formation thereof are disclosed. Several methods of and structures for increasing the threshold voltage of a parasitic transistor formed proximate deep trench isolation structures are described, including implanting a channel stop region into the bottom surface of the deep trench isolation structures, partially filling a bottom portion of the deep trench isolation structures with an insulating material, and/or filling at least a portion of the deep trench isolation structures with a doped polysilicon material.
摘要翻译: 公开了深沟槽隔离结构及其形成方法。 描述了用于增加形成在深沟槽隔离结构附近的寄生晶体管的阈值电压的几种方法和结构,包括将沟道阻挡区域注入深沟槽隔离结构的底表面,部分地填充深沟槽隔离的底部 具有绝缘材料的结构,和/或用掺杂的多晶硅材料填充至少一部分深沟槽隔离结构。
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公开(公告)号:US07723777B2
公开(公告)日:2010-05-25
申请号:US12189830
申请日:2008-08-12
申请人: John Power , Mayk Roehrich , Martin Stiftinger , Robert Strenz
发明人: John Power , Mayk Roehrich , Martin Stiftinger , Robert Strenz
IPC分类号: H01L29/94
CPC分类号: H01L27/105 , H01L21/28273 , H01L21/28282 , H01L21/823842 , H01L21/823857 , H01L21/823864 , H01L27/11526 , H01L27/11546 , H01L27/11573
摘要: One or more embodiments, relate to a field effect transistor, comprising: a substrate; a gate stack disposed over the substrate, the gate stack comprising a gate electrode overlying a gate dielectric; and a sidewall spacer may be disposed over the substrate and laterally disposed from the gate stack, the spacer comprising a polysilicon material.
摘要翻译: 一个或多个实施例涉及场效应晶体管,包括:衬底; 设置在所述衬底上的栅极堆叠,所述栅极堆叠包括覆盖栅极电介质的栅电极; 并且侧壁间隔物可以设置在衬底上并且从栅极堆叠横向设置,间隔物包括多晶硅材料。
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公开(公告)号:US07679130B2
公开(公告)日:2010-03-16
申请号:US11367247
申请日:2006-03-03
申请人: Armin Tilke , Danny Pak-Chum Shum , Laura Pescini , Ronald Kakoschke , Karl Robert Strenz , Martin Stiftinger
发明人: Armin Tilke , Danny Pak-Chum Shum , Laura Pescini , Ronald Kakoschke , Karl Robert Strenz , Martin Stiftinger
IPC分类号: H01L27/115
CPC分类号: H01L27/11526 , H01L21/76224 , H01L27/105 , H01L27/11521 , H01L27/11546
摘要: Deep trench isolation structures and methods of formation thereof are disclosed. Several methods of and structures for increasing the threshold voltage of a parasitic transistor formed proximate deep trench isolation structures are described, including implanting a channel stop region into the bottom surface of the deep trench isolation structures, partially filling a bottom portion of the deep trench isolation structures with an insulating material, and/or filling at least a portion of the deep trench isolation structures with a doped polysilicon material.
摘要翻译: 公开了深沟槽隔离结构及其形成方法。 描述了用于增加形成在深沟槽隔离结构附近的寄生晶体管的阈值电压的几种方法和结构,包括将沟道阻挡区域注入深沟槽隔离结构的底表面,部分地填充深沟槽隔离的底部 具有绝缘材料的结构,和/或用掺杂的多晶硅材料填充至少一部分深沟槽隔离结构。
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公开(公告)号:US20060267134A1
公开(公告)日:2006-11-30
申请号:US11367247
申请日:2006-03-03
申请人: Armin Tilke , Danny Shum , Laura Pescini , Ronald Kakoschke , Karl Strenz , Martin Stiftinger
发明人: Armin Tilke , Danny Shum , Laura Pescini , Ronald Kakoschke , Karl Strenz , Martin Stiftinger
IPC分类号: H01L29/00
CPC分类号: H01L27/11526 , H01L21/76224 , H01L27/105 , H01L27/11521 , H01L27/11546
摘要: Deep trench isolation structures and methods of formation thereof are disclosed. Several methods of and structures for increasing the threshold voltage of a parasitic transistor formed proximate deep trench isolation structures are described, including implanting a channel stop region into the bottom surface of the deep trench isolation structures, partially filling a bottom portion of the deep trench isolation structures with an insulating material, and/or filling at least a portion of the deep trench isolation structures with a doped polysilicon material.
摘要翻译: 公开了深沟槽隔离结构及其形成方法。 描述了用于增加形成在深沟槽隔离结构附近的寄生晶体管的阈值电压的几种方法和结构,包括将沟道阻挡区域注入深沟槽隔离结构的底表面,部分地填充深沟槽隔离的底部 具有绝缘材料的结构,和/或用掺杂的多晶硅材料填充至少一部分深沟槽隔离结构。
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