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公开(公告)号：US07087697B2
公开(公告)日：2006-08-08
申请号：US10181777
申请日：2001-01-15
IPC分类号： C08F110/02
CPC分类号： B29C47/0004 , B29C47/0023 , B29K2301/10 , C08F255/02 , Y10T428/1352 , C08F230/08
摘要： Composition based on a crosslinkable polyethylene comprising from 0.05 to 0.24 hydrolysable silane groups per 100 —CH2— units and having a standard density SD of at least 954 kg/m3 and a melt flow index MI5 of less than 1.5 g/10 min. Pipes for the transportation of fluids under pressure, which can be obtained by extruding this composition and then hydrolysing it.
摘要翻译： 基于可交联聚乙烯的组合物，其包含每100个-CH 2 2-单元0.05至0.24个可水解硅烷基团，并且具有至少954kg / m 3的标准密度SD和 熔体流动指数MI <5>小于1.5g / 10min。 用于在压力下输送流体的管道，其可以通过挤出该组合物然后水解而获得。
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公开(公告)号：US20050031813A1
公开(公告)日：2005-02-10
申请号：US10181777
申请日：2001-01-15
CPC分类号： B29C47/0004 , B29C47/0023 , B29K2301/10 , C08F255/02 , Y10T428/1352 , C08F230/08
摘要： Composition based on a crosslinkable polyethylene comprising from 0.05 to 0.24 hydrolysable silane groups per 100 —CH2— units and having a standard density SD of at least 954 kg/m3 and a melt flow index MI5 of less than 1.5 g/10 min. Pipes for the transportation of fluids under pressure, which can be obtained by extruding this composition and then hydrolysing it.
摘要翻译： 基于可交联聚乙烯的组合物，其包含每100个-CH2-单元0.05至0.24个可水解硅烷基团，并且具有至少954kg / m 3的标准密度SD和小于1.5g / 10min的熔体流动指数MI5 。 用于在压力下输送流体的管道，其可以通过挤出该组合物然后水解而获得。
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3.发明授权Ordering thread wavefronts instruction operations based on wavefront priority, operation counter, and ordering scheme 有权基于波前优先级，操作计数器和排序方案订购线程波前指令操作公开(公告)号：US09304772B2
公开(公告)日：2016-04-05
申请号：US13433939
申请日：2012-03-29
申请人： Laurent Lefebvre , Michael Mantor
发明人： Laurent Lefebvre , Michael Mantor
CPC分类号： G06F9/38 , G06F9/30 , G06F9/3836 , G06F9/3851 , G06F9/3885 , G06F9/3887
摘要： A system and method is provided for improving efficiency, power, and bandwidth consumption in parallel processing. Rather than requiring memory polling to ensure ordered execution of processes or threads in wavefronts, the techniques disclosed herein provide a system and method to allow any process or thread in a wavefront to run out of order as long as needed, but ensure ordered execution of multiple ordered instructions when needed. These operations are handled efficiently in hardware, but are flexible enough to be implemented in all manner of programming models.
摘要翻译： 提供了一种用于提高并行处理中的效率，功率和带宽消耗的系统和方法。 不需要内存轮询来确保波前的进程或线程的有序执行，本文公开的技术提供一种系统和方法，以允许波阵面中的任何进程或线程在需要时长时间运行，但确保有序执行多个 有需要时的指示。 这些操作在硬件中有效地处理，但是具有足够的灵活性，可以在各种编程模型中实现。
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公开(公告)号：US08400459B2
公开(公告)日：2013-03-19
申请号：US11746446
申请日：2007-05-09
CPC分类号： G06T1/20 , G06F9/3851 , G06T1/60 , G06T15/005 , G06T15/04 , G09G5/001 , G09G5/363
摘要： A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
摘要翻译： 图形处理系统包括存储多个像素命令线程和多个顶点命令线程的至少一个存储器件。 提供耦合到所述至少一个存储器件的仲裁器，其从所述多个像素命令线程中选择像素命令线程，以及从所述多个顶点命令线程中选择顶点命令线程。 仲裁器还从先前选择的像素命令线程和顶点命令线程中选择命令线程，该命令线程被提供给能够处理像素命令线程和顶点命令线程的命令处理引擎。
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公开(公告)号：US08190826B2
公开(公告)日：2012-05-29
申请号：US12128149
申请日：2008-05-28
CPC分类号： G06F12/0804 , G06F12/0855
摘要： Systems and methods for pipelined synchronization in a write-combining cache are described herein. An embodiment to transmit data to a memory to enable pipelined synchronization of a cache includes obtaining a plurality of synchronization events for transactions with said memory, calculating one or more matches between said events and said data stored in one or more cache-lines of said cache, storing event time stamps of events associated with said matches, generating one or more priority values based on said event time stamps, concurrently transmitting said data to said memory based on said priority values.
摘要翻译： 这里描述了在组合缓存中的流水线同步的系统和方法。 将数据发送到存储器以实现高速缓存的流水线同步的实施例包括获得用于与所述存储器的事务的多个同步事件，计算所述事件与存储在所述高速缓存的一个或多个高速缓存行中的所述数据之间的一个或多个匹配 存储与所述匹配关联的事件的事件时间戳，基于所述事件时间戳生成一个或多个优先级值，并基于所述优先级值同时发送所述数据到所述存储器。
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公开(公告)号：US07656417B2
公开(公告)日：2010-02-02
申请号：US10777842
申请日：2004-02-12
申请人： Larry D. Seiler , Laurent Lefebvre
发明人： Larry D. Seiler , Laurent Lefebvre
IPC分类号： G09G5/00
CPC分类号： G06T1/00
摘要： A method for determining the appearance of a pixel includes receiving fragment data for a pixel to be rendered; storing the fragment data; and determining an appearance value for the pixel based on the stored fragment data, wherein a portion of the stored fragment data is dropped when the number of fragment data per pixel exceeds a threshold value enabling large savings in memory footprint without impacting perceivably on the image quality. A graphics processor includes a rasterizer operative to generate fragment data for a pixel to be rendered in response to primitive information; and a render back end circuit, coupled to the rasterizer, operative to determine a pixel appearance value based on the fragment data by dropping the fragment data having the least effect on pixel appearance.
摘要翻译： 用于确定像素的外观的方法包括接收要渲染的像素的片段数据; 存储片段数据; 以及基于所存储的片段数据确定所述像素的出现值，其中当每个像素的片段数据的数量超过阈值时，存储的片段数据的一部分被丢弃，从而能够大大节省存储器占用空间，而不会明显影响图像质量 。 图形处理器包括光栅器，用于响应于原始信息而生成用于要呈现的像素的片段数据; 以及耦合到所述光栅化器的渲染后端电路，用于通过丢弃对像素外观具有最小影响的片段数据来确定基于片段数据的像素出现值。
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7.发明授权Method and apparatus for generating hierarchical depth culling characteristics 有权用于产生分层深度剔除特征的方法和装置公开(公告)号：US07538765B2
公开(公告)日：2009-05-26
申请号：US10914949
申请日：2004-08-10
IPC分类号： G06T15/40
CPC分类号： G06T15/40
摘要： A method and apparatus for generating hierarchical depth culling characteristics includes determining a first minimum depth value and a first maximum depth value for a first graphical element. The graphical element may be a primitive. The first minimum depth value may be a minimum Z-plane depth of a pixel within the primitive and a first maximum depth value is a maximum Z-plane value for a pixel within the primitive. The method and apparatus further includes determining a second minimum depth value and a second maximum depth value for a second graphical element, which may be a tile. The method and apparatus further includes calculating an intersection depth range having an intersection minimum depth value and an intersection maximum depth value based on the intersection of the first minimum depth value and the first maximum depth value and the second minimum depth value and the second maximum depth value.
摘要翻译： 一种用于产生分级深度剔除特征的方法和装置包括确定第一图形元素的第一最小深度值和第一最大深度值。 图形元素可以是基元。 第一最小深度值可以是基元内的像素的最小Z平面深度，并且第一最大深度值是该图元内的像素的最大Z平面值。 所述方法和装置还包括确定可以是瓦片的第二图形元素的第二最小深度值和第二最大深度值。 该方法和装置还包括基于第一最小深度值和第一最大深度值与第二最小深度值和第二最大深度的交点来计算具有交点最小深度值和交叉最大深度值的交点深度范围 值。
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公开(公告)号：US20070222787A1
公开(公告)日：2007-09-27
申请号：US11746453
申请日：2007-05-09
申请人： Laurent Lefebvre , Andrew Gruber , Stephen Morein
发明人： Laurent Lefebvre , Andrew Gruber , Stephen Morein
IPC分类号： G06T1/00
CPC分类号： G06T1/20 , G06F9/3851 , G06T1/60 , G06T15/005 , G06T15/04 , G09G5/001 , G09G5/363
摘要： A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a command thread from either the plurality of pixel or vertex command threads based on relative priorities of the plurality of pixel command threads and the plurality of vertex command threads. The selected command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
摘要翻译： 图形处理系统包括存储多个像素命令线程和多个顶点命令线程的至少一个存储器件。 提供耦合到所述至少一个存储器件的仲裁器，其基于所述多个像素命令线程和所述多个顶点命令线程的相对优先级从所述多个像素或顶点命令线程中选择命令线程。 所选择的命令线程被提供给能够处理像素命令线程和顶点命令线程的命令处理引擎。
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公开(公告)号：US06768491B2
公开(公告)日：2004-07-27
申请号：US10036782
申请日：2001-12-21
申请人： Laurent Lefebvre , Larry Seiler
发明人： Laurent Lefebvre , Larry Seiler
IPC分类号： G09G500
CPC分类号： G06T11/203 , G06T11/40 , G06T2200/12
摘要： A method and corresponding apparatus for calculating the centroid of a fragment to be rendered is disclosed. The method calls for moving the sampling point of a pixel from its initial center point to the center of the fragment containing a portion of an image to be rendered. The method comprises the steps of receiving a coverage mask containing at least one sample point of the pixel fragment under consideration; determining which of the sample points are within the fragment; determining a value representative of the number of sample points that are within the fragment; determining offset values of the fragment centroid based on the number of sample points within the fragment; and determining the barycentric coordinates of the centroid of the fragment. The centroid of the fragment is where sampling of the primitive will occur. By sampling at the centroid of the fragment, rendered image quality is improved due to the reduced anti-aliasing effects at the edges of the primitive.
摘要翻译： 公开了一种用于计算要渲染的片段的质心的方法和相应的装置。 该方法要求将像素的采样点从其初始中心点移动到包含要渲染的图像的一部分的片段的中心。 该方法包括以下步骤：接收包含所考虑的像素片段的至少一个采样点的覆盖掩模; 确定哪个采样点在片段内; 确定代表片段内的采样点数的值; 基于片段中的采样点的数量确定片段质心的偏移值; 并确定片段的重心的重心坐标。 片段的质心是原始图像的采样发生的地方。 通过在片段的质心处采样，由于在原始边缘处的抗锯齿效应降低，渲染图像质量得到改善。
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公开(公告)号：US08972693B2
公开(公告)日：2015-03-03
申请号：US13433901
申请日：2012-03-29
申请人： Laurent Lefebvre , Michael Mantor
发明人： Laurent Lefebvre , Michael Mantor
IPC分类号： G06F12/00
CPC分类号： G06F12/023 , G06F2212/1016 , Y02D10/13
摘要： A system and method is provided for improving efficiency, power, and bandwidth consumption in parallel processing. Rather than using memory polling to ensure that enough space is available in memory locations for, for example, write instructions, the techniques disclosed herein provide a system and method to automate this evaluation mechanism in environments such as data-parallel processing to efficiently check available space in memory locations before instructions such as write threads are allowed. These operations are handled efficiently in hardware, but are flexible enough to be implemented in all manner of programming models.
摘要翻译： 提供了一种用于提高并行处理中的效率，功率和带宽消耗的系统和方法。 不是使用存储器轮询来确保在例如写指令的存储器位置中有足够的空间可用，本文公开的技术提供了一种在诸如数据并行处理之类的环境中自动化该评估机制的系统和方法，以有效地检查可用空间 在诸如写入线程的指令被允许之前的存储单元中。 这些操作在硬件中有效地处理，但是具有足够的灵活性，可以在各种编程模型中实现。
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