Self-healing ring switch and method of controlling the same
    1.
    发明授权
    Self-healing ring switch and method of controlling the same 失效
    自愈式环形开关及其控制方法

    公开(公告)号:US5600631A

    公开(公告)日:1997-02-04

    申请号:US356617

    申请日:1994-12-15

    摘要: In order that the various ring-switching modes of 2-Fiber BLSR, 4-Fiber BLSR and UPSR may be switched merely by changing a software, space division switches are disposed across an add drop switch, and one output drop switch and one output of the second space division switch are connected with the input stage of a selector which can be selected at the unit of a time slot. As a result, the various ring-switching modes can be switched merely by changing the software while suppressing the scale of the switch. Moreover, the change from the ring switch to the linear switch and vice versa can be effected.

    摘要翻译: 为了仅通过改变软件就可以切换2光纤BLSR,4光纤BLSR和UPSR的各种环路切换模式,空分开关设置在加法分支开关上,一个输出下拉开关和一个输出 第二空分开关与可以以时隙为单位选择的选择器的输入级连接。 结果,可以仅通过在抑制开关的规模的同时改变软件来切换各种环形切换模式。 此外,可以实现从环形开关到线性开关的变化,反之亦然。

    Switch for self-healing ring
    2.
    发明授权
    Switch for self-healing ring 失效
    切换自愈环

    公开(公告)号:US5475676A

    公开(公告)日:1995-12-12

    申请号:US89948

    申请日:1993-07-12

    IPC分类号: H04J3/08 H04Q11/04

    CPC分类号: H04J3/085

    摘要: First stage and third stage four-input four-output space division switches are arranged before and after a second stage time division switch, and two outputs of the first stage space division switch and two inputs of the third stage space division switch are connected by bypassing the time division switch. The time division switch has n control memories. A first control memory stores connection information in a normal state of each path set in the transmission line, a second control memory stores connection information of a first alternative path when failures occur in a path, and an n-th control memory (n is any integer equal or greater than 3) stores connection information of an (n-1)th alternative path, and a control memory corresponding the a failure pattern is selected from the n control memories for each path.

    摘要翻译: 第一级和第三级四输入四输出空分开关布置在第二级分时开关之前和之后,第一级空分开关的两个输出和第三级空分开关的两个输入通过旁路连接 时分开关。 时分开关具有n个控制存储器。 第一控制存储器存储在传输线路中设置的每个路径的正常状态的连接信息,当路径中出现故障时,第二控制存储器存储第一替代路径的连接信息,并且第n控制存储器 整数等于或大于3)存储第(n-1)个替代路径的连接信息,并且从每个路径的n个控制存储器中选择与故障模式相对应的控制存储器。

    Self-healing ring switch and method of controlling the same
    3.
    发明授权
    Self-healing ring switch and method of controlling the same 失效
    自愈式环形开关及其控制方法

    公开(公告)号:US5815489A

    公开(公告)日:1998-09-29

    申请号:US741441

    申请日:1996-10-31

    IPC分类号: H04J3/00 H04J3/08 H04Q11/04

    摘要: A self-healing ring switch transmission system uses space division switches disposed upstream and downstream of an add drop switch in order to determine a correspondence with a plurality of ring-switch modes by merely changing the software. This is accomplished by having one output highway of the add drop switch and one output highway of a space division switch connected with an input stage of a selector for selecting one time slot of the two output highways.

    摘要翻译: 自愈式环形开关传输系统使用设置在分插开关的上游和下游的空分开关,以通过仅仅改变软件来确定与多个环形开关模式的对应关系。 这是通过将分插开关的一个输出高速公路和用于选择两个输出高速公路的一个时隙的选择器的输入级连接的空分开关的一个输出公路来实现的。

    Method and apparatus for frame phase conversion of signal having frame
structure
    5.
    发明授权
    Method and apparatus for frame phase conversion of signal having frame structure 失效
    具有帧结构的信号的帧相位转换的方法和装置

    公开(公告)号:US5331639A

    公开(公告)日:1994-07-19

    申请号:US609647

    申请日:1990-11-06

    CPC分类号: H04J3/0623 H04J2203/0089

    摘要: A method and an apparatus for converting a frame phase of a signal having a frame structure specified in the CCITT recommendations which contains N (N: an integer 2 or above) pieces of frames applied with time-division/multiplex, in which the N pieces of frames are given to N pieces of memories, respectively, a write address is given independently to each memory so that the N pieces of frames are written in the respective memories in a same phase as the phase in the signal, a read address is given independently to each memory so that the N pieces of frames are read out of the respective memories in a same phase as the write phase, a difference between a write address and a read address in each memory is set identical under an initial state, and justification is executed for a frame which is read out of the memory in accordance with a difference between existing write address and read address in each memory, whereby to perform frame phase conversion while maintaining relative phase among respective frames.

    摘要翻译: 一种用于转换具有CCITT建议中指定的帧结构的信号的帧相位的方法和装置,其包含以时分复用应用的N(N:整数2或以上)帧,其中N个 分别给予N个存储器,每个存储器独立地给出写入地址,使得N个帧以与信号中的相位相同的相位写入各个存储器中,给出读取地址 独立于每个存储器,使得N个帧在与写入相位相同的相位中从各个存储器读出,每个存储器中的写入地址和读取地址之间的差在初始状态下被设置为相同,并且对齐 根据存储器中的现有写入地址和读取地址之间的差异从存储器中读出的帧被执行,由此执行帧相位转换,同时保持相对相位 g各个框架。

    Routing method and apparatus for switching between routing and
conversion tables based on selection information included in cells to
be routed
    9.
    发明授权
    Routing method and apparatus for switching between routing and conversion tables based on selection information included in cells to be routed 失效
    基于包括在要路由的单元中的选择信息,在路由和转换表之间切换的路由方法和装置

    公开(公告)号:US5473598A

    公开(公告)日:1995-12-05

    申请号:US744513

    申请日:1991-08-13

    摘要: A cell routing method and apparatus in an ATM processing apparatus. The ATM processing apparatus has two or more routing tables associated with address filters of an ATM switch to store routing information for indicating the destination of cell output, and two or more conversion tables associated with VPI conversion circuits for replacing VPI (Virtual Path Identifier) or VCI conversion circuits for replacing VCI (Virtual Channel Identifier) to store information for indicating the VPI or VCI obtained after conversion. In an input interface circuit, selection information indicating which routing table and conversion table out of the above described two or more routing tables and two or more conversion tables should be selected is written into an occupied area within a cell. In a switch circuit, the selection information is read and one routing table is selected out of the above described two or more routing tables on the basis of the selection information thus read, and cell routing is thus performed based on information in the selected routing table. Further, in an output interface circuit, selection information contained in the cell is read and one conversion table is selected out of the above described two or more conversion tables on the basis of the selection information thus read, and VPI conversion or VCI conversion is thus executed based on information in the selected conversion table.

    摘要翻译: 一种ATM处理装置中的小区路由方法和装置。 ATM处理装置具有与ATM交换机的地址过滤器相关联的两个或多个路由表,以存储用于指示小区输出的目的地的路由信息​​,以及与用于替换VPI(虚拟路径标识符)的VPI转换电路相关联的两个或更多个转换表, 用于替换VCI(虚拟信道标识符)的VCI转换电路以存储用于指示转换后获得的VPI或VCI的信息。 在输入接口电路中,指示应当选择上述两个或多个路由表和两个或多个转换表中的哪个路由表和转换表的选择信息被写入小区内的占用区域。 在开关电路中,读取选择信息,并且根据这样读取的选择信息,从上述两个或多个路由表中选出一个路由表,并且基于所选择的路由表中的信息执行小区路由 。 此外,在输出接口电路中,读取包含在单元中的选择信息,并且根据这样读取的选择信息从上述两个或更多个转换表中选出一个转换表,并且因此进行VPI转换或VCI转换 基于所选转换表中的信息执行。

    Frame aligner and method and system for control thereof
    10.
    发明授权
    Frame aligner and method and system for control thereof 失效
    框架对准器及其控制方法和系统

    公开(公告)号:US5271006A

    公开(公告)日:1993-12-14

    申请号:US663956

    申请日:1991-03-19

    IPC分类号: H04J3/06 H04J3/22

    CPC分类号: H04J3/0629

    摘要: A frame aligner and a method and system for control thereof, in which the frame alignment is executed while assuring TSSI (Time Slot Sequence Integrity). In a system for transmitting a plurality of low-speed signals having a frame structure in a high-speed frame, a plurality of candidates for a write start phase for a frame aligner memory are set, and by accessing a common phase memory storing a write start phase shared by low-speed signals requiring phase matching therebetween of all the low-speed signals stored in the high-speed frame, a write start phase is selected from among the candidates for the write start phase for the frame aligner memory.

    摘要翻译: PCT No.PCT / JP90 / 00925 Sec。 371日期1991年3月19日 102(e)1991年3月19日PCT PCT 1990年7月18日PCT公布。 公开号WO91 / 01601 日期1991年2月7日。一种帧对准器及其控制方法和系统,其中在确保TSSI(时隙序列完整性)的同时执行帧对准。 在用于发送具有高速帧中的帧结构的多个低速信号的系统中,设置用于帧对准器存储器的写入开始阶段的多个候选,并且通过访问存储写入的公共相位存储器 低速信号共享的起始相位需要存储在高速帧中的所有低速信号之间的相位匹配,从用于帧对准器存储器的写入开始相位的候选中选择写入开始相位。