公开(公告)号：US20130285054A1

公开(公告)日：2013-10-31

申请号：US13992367

申请日：2011-12-06

申请人： Masao Moriguchi ,  Yohsuke Kanzaki ,  Yudai Takanishi ,  Takatsugu Kusumi ,  Hiroshi Matsukizono

发明人： Masao Moriguchi ,  Yohsuke Kanzaki ,  Yudai Takanishi ,  Takatsugu Kusumi ,  Hiroshi Matsukizono

IPC分类号： H01L27/15

CPC分类号： H01L27/15 ,  G02F1/1368 ,  H01L21/46 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

摘要： A semiconductor device according to the present invention includes: a gate electrode (62) of a thin film transistor (10) and an oxygen supply layer (64), the gate electrode (62) and the oxygen supply layer (64) being formed on a substrate (60); a gate insulating layer (66) formed on the gate electrode (62) and the oxygen supply layer (64); an oxide semiconductor layer (68) of the thin film transistor (10), the oxide semiconductor layer (68) being formed on the gate insulating layer (66); and a source electrode (70S) and a drain electrode (70d) of the thin film transistor (10), the source electrode (70S) and the drain electrode (70d) being formed on the gate insulating layer (66) and the oxide semiconductor layer (68).

摘要翻译： 根据本发明的半导体器件包括：薄膜晶体管（10）的栅电极（62）和氧供给层（64），栅电极（62）和供氧层（64）形成在 基板（60）; 形成在所述栅电极（62）和所述供氧层（64）上的栅绝缘层（66）。 所述薄膜晶体管（10）的氧化物半导体层（68），所述氧化物半导体层（68）形成在所述栅极绝缘层（66）上; 以及所述薄膜晶体管（10）的源电极（70S）和漏电极（70d），所述源极电极（70S）和所述漏极电极（70d）形成在所述栅极绝缘层（66）上，并且所述氧化物半导体 层（68）。

公开(公告)号：US20150108467A1

公开(公告)日：2015-04-23

申请号：US13996033

申请日：2011-12-15

申请人： Masao Moriguchi ,  Yohsuke Kanzaki ,  Yudai Takanishi ,  Takatsugu Kusumi ,  Hiroshi Matsukizono

发明人： Masao Moriguchi ,  Yohsuke Kanzaki ,  Yudai Takanishi ,  Takatsugu Kusumi ,  Hiroshi Matsukizono

IPC分类号： H01L23/00 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L27/124 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134372 ,  H01L23/564 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device (100) according to the present invention is a semiconductor device with a thin-film transistor (10), and includes: a gate electrode (62) which has been formed on a substrate (60) as a part of the thin-film transistor (10); a gate insulating layer (66) which has been formed on the gate electrode (62); an oxide semiconductor layer (68) which has been formed on the gate insulating layer (66); a source electrode (70s) and a drain electrode (70d) which have been formed on the oxide semiconductor layer (68); a protective layer (72) which has been formed on the oxide semiconductor layer (68), the source electrode (70s) and the drain electrode (70d); an oxygen supplying layer (74) which has been formed on the protective layer (72); and an anti-diffusion layer (78) which has been formed on the oxygen supplying layer (74).

摘要翻译： 根据本发明的半导体器件（100）是具有薄膜晶体管（10）的半导体器件，包括：栅极电极（62），其形成在基板（60）上，作为薄膜晶体管 - 薄膜晶体管（10）; 已经形成在所述栅极（62）上的栅极绝缘层（66）; 形成在栅极绝缘层（66）上的氧化物半导体层（68）; 形成在所述氧化物半导体层上的源极电极和漏极电极， 形成在氧化物半导体层（68）上的保护层（72），源电极（70s）和漏电极（70d）。 形成在保护层（72）上的供氧层（74）; 和形成在供氧层（74）上的抗扩散层（78）。

公开(公告)号：US08957418B2

公开(公告)日：2015-02-17

申请号：US13992367

申请日：2011-12-06

申请人： Masao Moriguchi ,  Yohsuke Kanzaki ,  Yudai Takanishi ,  Takatsugu Kusumi ,  Hiroshi Matsukizono

发明人： Masao Moriguchi ,  Yohsuke Kanzaki ,  Yudai Takanishi ,  Takatsugu Kusumi ,  Hiroshi Matsukizono

IPC分类号： H01L21/46 ,  H01L27/15 ,  H01L27/12 ,  H01L29/786 ,  H01L29/49 ,  H01L29/66 ,  H01L27/32 ,  G02F1/1368

CPC分类号： H01L27/15 ,  G02F1/1368 ,  H01L21/46 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

摘要： A semiconductor device according to the present invention includes: a gate electrode (62) of a thin film transistor (10) and an oxygen supply layer (64), the gate electrode (62) and the oxygen supply layer (64) being formed on a substrate (60); a gate insulating layer (66) formed on the gate electrode (62) and the oxygen supply layer (64); an oxide semiconductor layer (68) of the thin film transistor (10), the oxide semiconductor layer (68) being formed on the gate insulating layer (66); and a source electrode (70S) and a drain electrode (70d) of the thin film transistor (10), the source electrode (70S) and the drain electrode (70d) being formed on the gate insulating layer (66) and the oxide semiconductor layer (68).

摘要翻译： 根据本发明的半导体器件包括：薄膜晶体管（10）的栅电极（62）和氧供给层（64），栅电极（62）和供氧层（64）形成在 基板（60）; 形成在所述栅电极（62）和所述供氧层（64）上的栅绝缘层（66）。 所述薄膜晶体管（10）的氧化物半导体层（68），所述氧化物半导体层（68）形成在所述栅极绝缘层（66）上; 以及所述薄膜晶体管（10）的源电极（70S）和漏电极（70d），所述源极电极（70S）和所述漏极电极（70d）形成在所述栅极绝缘层（66）上，并且所述氧化物半导体 层（68）。

公开(公告)号：US20140022477A1

公开(公告)日：2014-01-23

申请号：US14009602

申请日：2012-04-02

申请人： Hiroshi Matsukizono

发明人： Hiroshi Matsukizono

IPC分类号： G02F1/1362

CPC分类号： G02F1/136286 ,  G02F1/1368 ,  G02F2201/52

摘要： There is provided a liquid crystal display panel that improves the reliability of thin film transistors while suppressing a degradation in display quality. A G TFT (120g) connected at its drain electrode (125d) to a G pixel electrode (130g) is disposed on the opposite side of the G pixel electrode (130g) from a B pixel electrode (130b). The distance between a B TFT (120b) connected at its drain electrode (125d) to the B pixel electrode (130b) and the B pixel electrode (130b) is greater than the distance between the G TFT (120g) connected at its drain electrode (125d) to the G pixel electrode (130g) and the G pixel electrode (130g). The distance between an R TFT (120r) connected at its drain electrode (125d) to an R pixel electrode (130r) and the B pixel electrode (130b) is greater than the distance between the B TFT (120b) connected to the B pixel electrode (130b) and the B pixel electrode (130b).

摘要翻译： 提供了一种在抑制显示质量下降的同时提高薄膜晶体管的可靠性的液晶显示面板。 在G像素电极（130g）的与B像素电极（130b）相反的一侧配置有在其漏电极（125d）与G像素电极（130g）连接的G TFT（120g）。 在其漏电极（125d）与B像素电极（130b）连接的B TFT（120b）与B像素电极（130b）之间的距离大于在其漏极连接的G TFT（120g）之间的距离 （125d）到G像素电极（130g）和G像素电极（130g）。 在其漏电极（125d）连接到R像素电极（130r）的R TFT（120r）与B像素电极（130b）之间的距离大于连接到B像素的B TFT（120b）之间的距离 电极（130b）和B像素电极（130b）。

公开(公告)号：US08212251B2

公开(公告)日：2012-07-03

申请号：US12531406

申请日：2008-02-29

申请人： Yoshimizu Moriya ,  Mutsumi Nakajima ,  Yasuyoshi Kaise ,  Makoto Kita ,  Hiroshi Matsukizono ,  Yoshiyuki Itoh

发明人： Yoshimizu Moriya ,  Mutsumi Nakajima ,  Yasuyoshi Kaise ,  Makoto Kita ,  Hiroshi Matsukizono ,  Yoshiyuki Itoh

IPC分类号： H01L27/15

CPC分类号： H01L27/12 ,  G02F1/13624 ,  G02F1/1368 ,  H01L27/1277 ,  H01L29/78645 ,  H01L29/78696

摘要： In an active-matrix substrate (100) according to the present invention, a semiconductor layer (110) has a first gettering region (112) adjacent to the source region (132) of a first thin-film transistor (130), a second gettering region (114) adjacent to the drain region (146) of a second thin-film transistor (140), and a third gettering region (116) adjacent to any of the source and drain regions located between the respective channel regions (134 and 144) of the first and second thin-film transistors (130 and 140) among the source and drain regions of the thin-film transistors included in the thin-film transistor element (120).

摘要翻译： 在根据本发明的有源矩阵基板（100）中，半导体层（110）具有与第一薄膜晶体管（130）的源极区域（132）相邻的第一吸杂区域（112），第二吸收区域 与第二薄膜晶体管（140）的漏极区域（146）相邻的吸杂区域（114）和位于各个沟道区域（134和134）之间的任何源极和漏极区域的第三吸杂区域（116） 包括在薄膜晶体管元件（120）中的薄膜晶体管的源极和漏极区域中的第一和第二薄膜晶体管（130和140）的第一和第二薄膜晶体管（144和144）。

公开(公告)号：US07968889B2

公开(公告)日：2011-06-28

申请号：US11997344

申请日：2006-07-24

申请人： Hiroshi Matsukizono

发明人： Hiroshi Matsukizono

IPC分类号： G02F1/133

CPC分类号： H01L29/4908 ,  H01L21/02532 ,  H01L21/02675 ,  H01L29/66757 ,  H01L29/78675

摘要： The present invention provides a semiconductor device having a high breakdown voltage and high reliability even if a gate electrode is formed to be thin. The present invention is a semiconductor device including a polycrystal semiconductor layer, a gate insulating film, and a gate electrode, stacked on an insulating substrate in this order, wherein the polycrystal semiconductor layer has a surface roughness of 9 nm or less, the gate insulating film has a multilayer structure including a silicon oxide film on the polycrystal semiconductor layer side and a film containing a material with a dielectric constant higher than a dielectric constant of silicon oxide on the gate electrode side.

摘要翻译： 本发明提供了即使栅电极形成较薄的具有高击穿电压和高可靠性的半导体器件。 本发明是依次层叠在绝缘基板上的多晶半导体层，栅极绝缘膜和栅电极的半导体装置，其中，多晶半导体层的表面粗糙度为9nm以下，栅极绝缘 膜具有包含多晶半导体层侧的氧化硅膜的多层结构和含有介电常数高于栅电极侧的氧化硅的介电常数的材料的膜。

公开(公告)号：US09349750B2

公开(公告)日：2016-05-24

申请号：US14077390

申请日：2013-11-12

申请人： Hiroyuki Miyake ,  Shunpei Yamazaki ,  Yoshifumi Tanada ,  Manabu Sato ,  Toshinari Sasaki ,  Kenichi Okazaki ,  Junichi Koezuka ,  Takuya Matsuo ,  Hiroshi Matsukizono ,  Yosuke Kanzaki ,  Shigeyasu Mori

发明人： Hiroyuki Miyake ,  Shunpei Yamazaki ,  Yoshifumi Tanada ,  Manabu Sato ,  Toshinari Sasaki ,  Kenichi Okazaki ,  Junichi Koezuka ,  Takuya Matsuo ,  Hiroshi Matsukizono ,  Yosuke Kanzaki ,  Shigeyasu Mori

IPC分类号： H01L27/12 ,  H01L29/786

CPC分类号： H01L27/1225 ,  H01L27/124 ,  H01L29/78648

摘要： A semiconductor device includes: a transistor including a gate electrode, a gate insulating film over the gate electrode, a semiconductor layer over the gate insulating film, and a source electrode and a drain electrode over the semiconductor layer; a first insulating film comprising an inorganic material over the transistor; a second insulating film comprising an organic material over the first insulating film; a first conductive film over the second insulating film and in a region overlapping with the semiconductor layer; a third insulating film comprising an inorganic material over the first conductive film; and a second conductive film over the third insulating film and in a region overlapping with the first conductive film. The absolute value of a first potential applied to the first conductive film is greater than the absolute value of a second potential applied to the second conductive film.

摘要翻译： 半导体器件包括：晶体管，包括栅极电极，栅极上的栅极绝缘膜，栅极绝缘膜上的半导体层，以及半导体层上的源极和漏极; 包括晶体管上的无机材料的第一绝缘膜; 包括在所述第一绝缘膜上的有机材料的第二绝缘膜; 在所述第二绝缘膜上并且在与所述半导体层重叠的区域中的第一导电膜; 在所述第一导电膜上包括无机材料的第三绝缘膜; 以及在所述第三绝缘膜上并且在与所述第一导电膜重叠的区域中的第二导电膜。 施加到第一导电膜的第一电位的绝对值大于施加到第二导电膜的第二电位的绝对值。

公开(公告)号：US09312278B2

公开(公告)日：2016-04-12

申请号：US14062085

申请日：2013-10-24

申请人： Junichi Koezuka ,  Yukinori Shima ,  Yasuharu Hosaka ,  Kenichi Okazaki ,  Takuya Matsuo ,  Shigeyasu Mori ,  Yosuke Kanzaki ,  Hiroshi Matsukizono

发明人： Junichi Koezuka ,  Yukinori Shima ,  Yasuharu Hosaka ,  Kenichi Okazaki ,  Takuya Matsuo ,  Shigeyasu Mori ,  Yosuke Kanzaki ,  Hiroshi Matsukizono

IPC分类号： H01L27/12 ,  H01L27/32

CPC分类号： H01L27/1225 ,  H01L27/3262

摘要： To improve the reliability of a transistor as well as to inhibit fluctuation in electric characteristics. A display device includes a pixel portion and a driver circuit portion outside the pixel portion; the pixel portion includes a pixel transistor, a first insulating film covering the pixel transistor and including an inorganic material, a second insulating film including an organic material over the first insulating film, and a third insulating film including an inorganic material over the second insulating film; and the driver circuit portion includes a driving transistor to supply a signal to the pixel transistor, the first insulating film covering the driving transistor, and the second insulating film over the first insulating film, and further includes a region in which the third insulating film is not formed over the second insulating film or a region in which the second insulating film is not covered with the third insulating film.

摘要翻译： 提高晶体管的可靠性以及抑制电特性的波动。 显示装置包括像素部分和像素部分外部的驱动器电路部分; 像素部分包括像素晶体管，覆盖像素晶体管并且包括无机材料的第一绝缘膜，在第一绝缘膜上的包括有机材料的第二绝缘膜，以及在第二绝缘膜上的包括无机材料的第三绝缘膜 ; 并且所述驱动电路部分包括驱动晶体管，用于向所述像素晶体管提供信号，所述第一绝缘膜覆盖所述驱动晶体管，并且所述第二绝缘膜在所述第一绝缘膜上方，并且还包括所述第三绝缘膜为 不形成在第二绝缘膜上或第二绝缘膜未被第三绝缘膜覆盖的区域。

公开(公告)号：US20130271690A1

公开(公告)日：2013-10-17

申请号：US13996602

申请日：2011-12-20

申请人： Hiroshi Matsukizono

发明人： Hiroshi Matsukizono

IPC分类号： H01L29/786 ,  H01L29/66 ,  G02F1/1368

CPC分类号： G02F1/1339 ,  G02F1/133553 ,  G02F1/1341 ,  G02F1/136209 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/7869

摘要： A semiconductor device (1001) includes a thin-film transistor (103) including a gate electrode (3a), source and drain electrodes (13as, 13ad), and an oxide semiconductor layer (7), and a source bus line (13s). The source electrode, the source bus line and the drain electrode include a first metallic element and the oxide semiconductor layer includes a second metallic element. When viewed along a normal to its substrate, at least respective portions of the source electrode, the source bus line, and the drain electrode overlap with the oxide semiconductor layer. A low reflecting layer (4s, 4d) which includes the first and second metallic elements and which has a lower reflectance to visible radiation than the source electrode has been formed between the source electrode and the oxide semiconductor layer, between the source bus line and the oxide semiconductor layer, and between the drain line and the oxide semiconductor layer.

摘要翻译： 半导体器件（1001）包括：薄膜晶体管（103），包括栅电极（3a），源极和漏极（13as，13ad）和氧化物半导体层（7）;以及源极总线（13s） 。 源电极，源极总线和漏电极包括第一金属元件，氧化物半导体层包括第二金属元件。 当沿着其基板的法线观察时，源电极，源极总线和漏电极的至少相应部分与氧化物半导体层重叠。 在源电极和氧化物半导体层之间，在源极总线和第二金属元件之间形成有包含第一和第二金属元件并且具有比源电极的可见光辐射更低的反射率的低反射层（4s，​​4d） 氧化物半导体层，并且在漏极线和氧化物半导体层之间。

公开(公告)号：US20130037800A1

公开(公告)日：2013-02-14

申请号：US13642179

申请日：2011-01-26

申请人： Hiroshi Matsukizono

发明人： Hiroshi Matsukizono

IPC分类号： H01L29/786 ,  H01L21/34

CPC分类号： H01L29/7869 ,  G02F2001/13685 ,  G02F2202/10 ,  H01L27/1225

摘要： A semiconductor device includes an oxide semiconductor film in which a channel portion is formed and a gate portion arranged to be opposed to the channel portion. A drain portion in which the oxide semiconductor film has been subjected to resistance reduction process and an intermediate area which is provided between the drain portion and the channel portion and has not been subjected to resistance reduction process are formed in the oxide semiconductor film, and the semiconductor device includes a conductive film to block resistance reduction process to the intermediate area at least at a part.

摘要翻译： 半导体器件包括其中形成沟道部分的氧化物半导体膜和布置成与沟道部分相对的栅极部分。 在氧化物半导体膜中形成有氧化物半导体膜经过电阻降低处理的漏极部分和设置在漏极部分和沟道部分之间并且没有进行电阻降低处理的中间区域， 半导体器件包括至少部分地阻挡到中间区域的电阻降低处理的导电膜。