摘要:
A stacked switched capacitor (SSC) energy buffer circuit includes a switching network and a plurality of energy storage capacitors. The switching network need operate at only a relatively low switching frequency and can take advantage of soft charging of the energy storage capacitors to reduce loss. Thus, efficiency of the SSC energy buffer circuit can be extremely high compared with the efficiency of other energy buffer circuits. Since circuits utilizing the SSC energy buffer architecture need not utilize electrolytic capacitors, circuits utilizing the SSC energy buffer architecture overcome limitations of energy buffers utilizing electrolytic capacitors. Circuits utilizing the SSC energy buffer architecture (without electrolytic capacitors) can achieve an effective energy density characteristic comparable to energy buffers utilizing electrolytic capacitors. The SSC energy buffer architecture exhibits losses that scale with the amount of energy buffered, such that a relatively high efficiency can be achieved across a desired operating range.
摘要:
A split drive transformer (SDT) and use of such a transformer in a power converter is described. The power converter includes a power and distributor circuit configured to receive one or more input signals and provides multiple signals to a first side of the SDT. The SDT receives the signals provided to the first side thereof and provides signals at a second side thereof to a power combiner and rectifier circuit which is configured to provide output signals to a load. In some embodiments, the SDT may be provided as a switched-capacitor (SC) SDT. In some embodiments, the power converter may optionally include a level selection circuit (LSC) on one or both of the distributor and combiner sides.
摘要:
An impedance control resonant power converter (converter) operated at a fixed switching frequency includes an impedance control network (ICN) coupled between two or more inverters operated at a fixed duty ratio with a phase shift between them and one or more rectifiers. The phase shift is used to control output power or compensate for variations in input or output voltage. The converter operates at fixed frequency yet achieves simultaneous zero voltage switching (ZVS) and zero or near zero current switching (ZCS) across a wide operating range. Output power may be controlled by: (1) changing phase shift between inverters; or (2) adjusting phase shift between inverters depending upon input and/or output voltages so that an admittance presented to the inverters is conductive and then turning the converter on and off at a frequency lower than the converter switching frequency to control output power below a value set by the phase shift.
摘要:
A stacked switched capacitor (SSC) energy buffer circuit includes a switching network and a plurality of energy storage capacitors. The switching network need operate at only a relatively low switching frequency and can take advantage of soft charging of the energy storage capacitors to reduce loss. Thus, efficiency of the SSC energy buffer circuit can be extremely high compared with the efficiency of other energy buffer circuits. Since circuits utilizing the SSC energy buffer architecture need not utilize electrolytic capacitors, circuits utilizing the SSC energy buffer architecture overcome limitations of energy buffers utilizing electrolytic capacitors. Circuits utilizing the SSC energy buffer architecture (without electrolytic capacitors) can achieve an effective energy density characteristic comparable to energy buffers utilizing electrolytic capacitors. The SSC energy buffer architecture exhibits losses that scale with the amount of energy buffered, such that a relatively high efficiency can be achieved across a desired operating range.
摘要:
A power converter for converting DC power to DC power includes an inverter stage having two or more switched inverters configured to receive DC power from a source and produce a switched AC output power signal. A transformation stage is coupled to receive the switched output power signal from the inverter stage, shape the output power signal, and produce a shaped power signal. A rectifier stage having two or more switched inverters coupled to receive the shaped power signal and convert the shaped power signal to a DC output power signal is included. A controller circuit is coupled to operate the power converter in a variable frequency multiplier mode where at least one of the switched inverters is switched at a frequency or duty cycle that results in an output signal having a frequency that is a harmonic of the fundamental frequency being generated by the power converter.
摘要:
A circuit includes a reconfigurable rectifier, a voltage balancer, and a pair of converters. The reconfigurable rectifier includes an ac input port and three output ports. In a first configuration, the reconfigurable rectifier can deliver power at a first output port and, in a second configuration, to at least a second output port. The voltage balancer includes first and second ports coupled to second and third output ports of the reconfigurable rectifier and is configured to balance received voltage at the first and second ports. The first converter has an input coupled to the first port of the voltage balancer and an output at which a first converted voltage signal is provided. The second converter has an input coupled to the second port of the voltage balancer and an output at which a second converted voltage signal is provided.
摘要:
A power converter for converting DC power to DC power includes an inverter stage having two or more switched inverters configured to receive DC power from a source and produce a switched AC output power signal. A transformation stage is coupled to receive the switched output power signal from the inverter stage, shape the output power signal, and produce a shaped power signal. A rectifier stage having two or more switched inverters coupled to receive the shaped power signal and convert the shaped power signal to a DC output power signal is included. A controller circuit is coupled to operate the power converter in a variable frequency multiplier mode where at least one of the switched inverters is switched at a frequency or duty cycle that results in an output signal having a frequency that is a harmonic of the fundamental frequency being generated by the power converter.
摘要:
Described herein are power conversion systems and related techniques which utilize a coupled split path (CSP) circuit architecture. The CSP structure combines switches, capacitors and magnetic elements in such a way that power is processed in multiple coupled split paths in a variety of voltage domains. These techniques are well suited for power conversion applications that have one or more input/output ports that have a wide voltage range, or if the application is interfacing with the ac line voltage and requires power-factor correction.
摘要:
A power converter for converting DC power to DC power includes an inverter stage having two or more switched inverters configured to receive DC power from a source and produce a switched AC output power signal. A transformation stage is coupled to receive the switched output power signal from the inverter stage, shape the output power signal, and produce a shaped power signal. A rectifier stage having two or more switched inverters coupled to receive the shaped power signal and convert the shaped power signal to a DC output power signal is included. A controller circuit is coupled to operate the power converter in a variable frequency multiplier mode where at least one of the switched inverters is switched at a frequency or duty cycle that results in an output signal having a frequency that is a harmonic of the fundamental frequency being generated by the power converter.