-
1.发明授权公开(公告)号：US06792015B1
公开(公告)日：2004-09-14
申请号：US09751996
申请日：2000-12-29
IPC分类号： H01S304
CPC分类号： H01S5/02415 , H01S5/042
摘要： An optical transceiver and method therefore provides a cooled laser diode configured to run in either a low power mode or a standard mode. A method for a thermo-electric cooler includes coupling the thermo-electric cooler to a laser diode, operating the thermo-electric cooler in one of a low power mode and a standard mode, and switching between the low power mode and the standard mode. The laser diode is configured to transmit signals in the low power mode and the standard mode. The low power mode maintains the laser diode at a temperature within a predetermined range of temperatures. The standard mode maintains the laser diode at a temperature that corresponds to a predetermined wavelength of light output from the laser diode. In one embodiment, the low power mode is a Time Division Multiplexing (TDM) mode and the standard mode is a Dense Wavelength Divison Multipexing (DWDM) mode. The optical transceiver includes a temperature circuit, a thermo-electric cooler coupled to the temperature circuit, and a laser diode coupled to the thermo-electric cooler. The thermo-electric cooler is responsive to inputs from the temperature circuit, the inputs identifying one of at least a first mode and a second mode, wherein a choice of mode is a function of a performance requirement. The optical transceiver includes a temperature circuit that includes a switch configured to alter the thermo-electric cooler between the first mode and the second mode.
摘要翻译： 因此，光收发器和方法提供了被配置为以低功率模式或标准模式运行的冷却激光二极管。 热电冷却器的方法包括将热电冷却器耦合到激光二极管，以低功率模式和标准模式之一操作热电冷却器，以及在低功率模式和标准模式之间切换。 激光二极管被配置为以低功率模式和标准模式传输信号。 低功率模式将激光二极管保持在预定温度范围内的温度。 标准模式将激光二极管保持在对应于从激光二极管输出的光的预定波长的温度。 在一个实施例中，低功率模式是时分复用（TDM）模式，标准模式是密集波分复用多路（DWDM）模式。 光收发器包括温度电路，耦合到温度电路的热电冷却器和耦合到热电冷却器的激光二极管。 热电冷却器响应于来自温度电路的输入，所述输入识别至少第一模式和第二模式中的一个，其中模式的选择是性能要求的函数。 光收发器包括温度电路，其包括被配置为在第一模式和第二模式之间改变热电冷却器的开关。
-
公开(公告)号：US07269891B1
公开(公告)日：2007-09-18
申请号：US10726927
申请日：2003-12-03
IPC分类号： B23P21/00
CPC分类号： H05K3/368 , H05K1/141 , H05K3/306 , H05K2201/096 , H05K2201/10303 , H05K2201/10325 , H05K2201/10424 , Y10T29/49126 , Y10T29/49139 , Y10T29/49153 , Y10T29/49155 , Y10T29/49165 , Y10T29/49208 , Y10T29/53087 , Y10T29/53091 , Y10T29/53174 , Y10T29/53261 , Y10T29/53265
摘要： A system provides a zero interconnection height in a board-to-board interconnect while maintaining efficient space allocation for multiple axis connections by providing a floating connection in one plane thereby enabling a connection in another plane. A first circuit board having a first plurality of through-holes is aligned with a second circuit board having a second plurality of through-holes so that the first plurality of through-holes is matched with the second plurality of through-holes. An interconnection height of zero is provided between the first circuit board and the second circuit board. At least one pass-through socket, which includes pass-through socket through-holes, is aligned with the combination of the first circuit board and second circuit board. One or more pins disposed on a pin header are inserted through the pass-through socket, the first circuit board, and the second circuit board.
摘要翻译： 系统在板对板互连中提供零互连高度，同时通过在一个平面中提供浮动连接来维持多轴连接的有效空间分配，从而实现另一平面中的连接。 具有第一多个通孔的第一电路板与具有第二多个通孔的第二电路板对准，使得第一多个通孔与第二多个通孔匹配。 在第一电路板和第二电路板之间设置零的互连高度。 至少一个直通插座，其包括通孔插座通孔，与第一电路板和第二电路板的组合对准。 设置在针头上的一个或多个销插入穿过插座，第一电路板和第二电路板。
-
3.发明授权Method and apparatus for selecting a first clock and second clock for first and second devices respectively from an up-converted clock and an aligned clock for synchronization 有权分别从上转换时钟和用于同步的对准时钟分别选择第一和第二装置的第一时钟和第二时钟的方法和装置公开(公告)号：US06751743B1
公开(公告)日：2004-06-15
申请号：US09746323
申请日：2000-12-22
IPC分类号： G06F112
CPC分类号： H04J3/0685 , G06F1/12 , H03L7/06
摘要： A method and apparatus for synchronizing clocks is provided that is flexible and compensates for process, voltage, and temperature (PVT) variations and other timing differences between two devices. The present invention includes producing an up-converted clock from a system clock, the up-converted clock having a frequency that is a multiple of the frequency of the system clock, producing an aligned clock from a data-aligned clock from a first device and a counter clock from a second device, producing a de-jittered clock, selecting a first reference clock to send to the first device from the up-converted clock, the aligned clock and the de-jittered clock, and selecting a second reference clock to send to the second device from the up-converted clock, the aligned clock and the de-jittered clock.
摘要翻译： 提供了一种用于同步时钟的方法和装置，其是灵活的并且补偿两个装置之间的过程，电压和温度（PVT）变化和其他定时差异。 本发明包括从系统时钟产生上变频时钟，上转换时钟的频率是系统时钟的频率的倍数，从来自第一设备的数据对准时钟产生对准的时钟， 来自第二设备的计数器时钟，产生去抖动时钟，选择第一参考时钟以从上变频时钟，对准时钟和去激励时钟发送到第一设备，并且选择第二参考时钟 从上转换的时钟，对齐的时钟和去抖动的时钟发送到第二个设备。
-
公开(公告)号：US06698091B1
公开(公告)日：2004-03-02
申请号：US09752162
申请日：2000-12-29
IPC分类号： H05K336
CPC分类号： H05K3/368 , H05K1/141 , H05K3/306 , H05K2201/096 , H05K2201/10303 , H05K2201/10325 , H05K2201/10424 , Y10T29/49126 , Y10T29/49139 , Y10T29/49153 , Y10T29/49155 , Y10T29/49165 , Y10T29/49208 , Y10T29/53087 , Y10T29/53091 , Y10T29/53174 , Y10T29/53261 , Y10T29/53265
摘要： A method and circuit board assembly provide a zero interconnection height in a board-to-board interconnect while maintaining efficient space allocation for multiple axis connections by providing a floating connection in one plane thereby enabling a connection in another plane. A method for interconnecting includes aligning a first circuit board having a first plurality of through-holes with a second circuit board having a second plurality of through-holes by matching the first plurality of through-holes with the second plurality of through-holes, the aligning providing an interconnection height of zero between the first circuit board and the second circuit board, aligning at least one pass-through socket with the aligned combination of the first circuit board and second circuit board, the at least one pass-through socket including pass-through socket through-holes, and inserting one or more pins disposed on a pin header through the at least one pass-through socket, the first circuit board and the second circuit board. The method further includes floating one of the first circuit board and the second circuit board prior to inserting the pin header, the floating enabling the first circuit board to interconnect with the second circuit board with a connector aligned along an axis different from the pin header.
摘要翻译： 方法和电路板组件在板对板互连中提供零互连高度，同时通过在一个平面中提供浮动连接，从而实现另一平面中的连接，同时为多轴连接保持有效的空间分配。 一种用于互连的方法包括：将具有第一多个通孔的第一电路板与具有第二多个通孔的第二电路板对准，该第二电路板具有第一多个通孔与第二多个通孔的匹配， 对准在第一电路板和第二电路板之间提供零的互连高度，使至少一个通孔插座与第一电路板和第二电路板的对准组合对准，所述至少一个穿通插座包括通孔 通过插座通孔，并且通过所述至少一个穿通插座，所述第一电路板和所述第二电路板插入设置在所述插头插头上的一个或多个销。 该方法还包括在插入引脚头之前漂浮第一电路板和第二电路板中的一个，浮动使得第一电路板与第二电路板互连，该连接器沿着与引脚头不同的轴对准。
-
公开(公告)号：US5926303A
公开(公告)日：1999-07-20
申请号：US901996
申请日：1997-07-29
申请人： Louis J. Giebel , Matthew L. Heston
发明人： Louis J. Giebel , Matthew L. Heston
IPC分类号： H04B10/00
CPC分类号： H04B10/801
摘要： An optical interface circuit �40! is provided. The optical interface circuit �40! includes a receiver circuit �82, 102! that receives incoming data from an optical signal and generates an electrical signal having the encoded data. The optical interface circuit �40! also includes a transmitter circuit �82, 104! that receives outgoing data and encodes the outgoing data into an optical signal. An interface circuit �112! connected to the receiver circuit �82, 102! and the transmitter circuit �82, 104! transmits control commands and control data to the receiver circuit �82, 102! and the transmitter circuit �82, 104!, and receives response data from the receiver circuit �82, 102! and the transmitter circuit �82, 104!. A controller circuit �84, 114! connected to the interface circuit �112! transmits the control commands and the control data to the interface circuit �112! and receives the response data from the interface circuit �112!.
摘要翻译： 提供了光接口电路[40]。 光接口电路[40]包括从光信号接收输入数据并产生具有编码数据的电信号的接收机电路[82,102]。 光接口电路[40]还包括接收输出数据并将输出数据编码成光信号的发射机电路[82,104]。 连接到接收机电路[82,102]和发射机电路[82,104]的接口电路[112]向接收机电路[82,102]和发射机电路[82,104]发送控制命令和控制数据， 并从接收机电路[82,102]和发射机电路[82,104]接收响应数据。 连接到接口电路[112]的控制器电路[84,114]将控制命令和控制数据发送到接口电路[112]，并从接口电路[112]接收响应数据。
-
公开(公告)号：US07731432B2
公开(公告)日：2010-06-08
申请号：US12401140
申请日：2009-03-10
CPC分类号： H04B10/40 , H04B10/691 , H05K1/144
摘要： Optical transceiver modules with multiple channel connection with connectors on a motherboard of a line card for network devices, such as a switch, router, crossconnect and the like, are presented. The modules have staggered electronic boards which can engage the connectors which are laterally displaced on the motherboard. The connectors are also arranged so that one of them can engage an optical transceiver module in an SFP connection so that the motherboard connectors are compatible with multiple channel and single channel (SFP) connections.
摘要翻译： 提供具有多通道连接的光收发器模块，其中用于诸如交换机，路由器，交叉连接等的网络设备的线路卡的主板上的连接器。 这些模块具有交错的电子板，其可以接合在主板上横向移位的连接器。 连接器也被布置成使得它们中的一个可以接合SFP连接中的光收发器模块，使得主板连接器与多个通道和单通道（SFP）连接兼容。
-
7.发明申请Multi-Rate, Multi-Protocol, Multi-Port Line Interface for a Multiservice Switching Platform 有权多业务交换平台的多速率，多协议，多端口线路接口公开(公告)号：US20090175289A1
公开(公告)日：2009-07-09
申请号：US12403601
申请日：2009-03-13
CPC分类号： H04J3/1611 , H04J3/1664 , H04J2203/0025 , H04J2203/0085 , H04J2203/0094 , H04J2203/0096 , H04L49/357
摘要： Methods and apparatus for enabling a line card to support multiple ports, multiple rates, and multiple protocols within an optical network system are disclosed. According to one aspect of the present invention, a line card that is suitable for incorporation into one of a multi-slot broadband digital cross-connect system or a multiservice provisioning platform includes a first port and a plurality of devices. The first port is arranged to be provisioned to accept an input signal which may be one of a signal of a first protocol and a signal of a second protocol. The plurality of devices being arranged to process the input signal to create an output signal which has a SONET payload. In one embodiment, the signal of the first protocol is an OC-n signal and the signal of the second protocol is a Gigabit Ethernet signal.
摘要翻译： 公开了一种用于使线路卡支持光网络系统内的多个端口，多个速率和多个协议的方法和装置。 根据本发明的一个方面，适用于并入多时隙宽带数字交叉连接系统或多业务供应平台之一的线路卡包括第一端口和多个设备。 第一端口被布置成被配置为接受可以是第一协议的信号和第二协议的信号之一的输入信号。 多个设备被布置成处理输入信号以产生具有SONET有效载荷的输出信号。 在一个实施例中，第一协议的信号是OC-n信号，并且第二协议的信号是千兆以太网信号。
-
8.发明授权Multi-rate, multi-protocol, multi-port line interface for a multiservice switching platform 有权多业务交换平台的多速率，多协议，多端口线路接口公开(公告)号：US07822022B2
公开(公告)日：2010-10-26
申请号：US12403601
申请日：2009-03-13
IPC分类号： H04L12/66
CPC分类号： H04J3/1611 , H04J3/1664 , H04J2203/0025 , H04J2203/0085 , H04J2203/0094 , H04J2203/0096 , H04L49/357
摘要： Methods and apparatus for enabling a line card to support multiple ports, multiple rates, and multiple protocols within an optical network system are disclosed. According to one embodiment, a line card that is suitable for incorporation into one of a multi-slot broadband digital cross-connect system or a multiservice provisioning platform includes a first port and a plurality of devices. The first port is arranged to be provisioned to accept an input signal which may be one of a signal of a first protocol and a signal of a second protocol. The plurality of devices being arranged to process the input signal to create an output signal which has a SONET payload. In one embodiment, the signal of the first protocol is an OC-n signal and the signal of the second protocol is a Gigabit Ethernet signal.
摘要翻译： 公开了一种用于使线路卡支持光网络系统内的多个端口，多个速率和多个协议的方法和装置。 根据一个实施例，适于并入到多时隙宽带数字交叉连接系统或多服务供应平台之一的线卡包括第一端口和多个设备。 第一端口被布置成被配置为接受可以是第一协议的信号和第二协议的信号之一的输入信号。 多个设备被布置成处理输入信号以产生具有SONET有效载荷的输出信号。 在一个实施例中，第一协议的信号是OC-n信号，并且第二协议的信号是千兆以太网信号。
-
9.发明授权Multi-rate, multi-protocol, multi-port line interface for a multiservice switching platform 有权多业务交换平台的多速率，多协议，多端口线路接口公开(公告)号：US06956847B2
公开(公告)日：2005-10-18
申请号：US10465308
申请日：2003-06-19
CPC分类号： H04J3/1611 , H04J3/1664 , H04J2203/0025 , H04J2203/0085 , H04J2203/0094 , H04J2203/0096 , H04L49/357
摘要： Methods and apparatus for enabling a line card to support multiple ports, multiple rates, and multiple protocols within an optical network system are disclosed. According to one aspect of the present invention, a line card that is suitable for incorporation into one of a multi-slot broadband digital cross-connect system or a multiservice provisioning platform includes a first port and a plurality of devices. The first port is arranged to be provisioned to accept an input signal which may be one of a signal of a first protocol and a signal of a second protocol. The plurality of devices being arranged to process the input signal to create an output signal which has a SONET payload. In one embodiment, the signal of the first protocol is an OC-n signal and the signal of the second protocol is a Gigabit Ethernet signal.
摘要翻译： 公开了一种用于使线路卡支持光网络系统内的多个端口，多个速率和多个协议的方法和装置。 根据本发明的一个方面，适用于并入多时隙宽带数字交叉连接系统或多业务供应平台之一的线路卡包括第一端口和多个设备。 第一端口被布置成被配置为接受可以是第一协议的信号和第二协议的信号之一的输入信号。 多个设备被布置成处理输入信号以产生具有SONET有效载荷的输出信号。 在一个实施例中，第一协议的信号是OC-n信号，并且第二协议的信号是千兆以太网信号。
-
10.发明申请公开(公告)号：US20090169154A1
公开(公告)日：2009-07-02
申请号：US12401140
申请日：2009-03-10
CPC分类号： H04B10/40 , H04B10/691 , H05K1/144
摘要： Optical transceiver modules with multiple channel connection with connectors on a motherboard of a line card for network devices, such as a switch, router, crossconnect and the like, are presented. The modules have staggered electronic boards which can engage the connectors which are laterally displaced on the motherboard. The connectors are also arranged so that one of them can engage an optical transceiver module in an SFP connection so that the motherboard connectors are compatible with multiple channel and single channel (SFP) connections.
摘要翻译： 提供具有多通道连接的光收发器模块，其中用于诸如交换机，路由器，交叉连接等的网络设备的线路卡的主板上的连接器。 这些模块具有交错的电子板，其可以接合在主板上横向移位的连接器。 连接器也被布置成使得它们中的一个可以接合SFP连接中的光收发器模块，使得主板连接器与多个通道和单通道（SFP）连接兼容。
-
-
-
-
-
-
-
-
-
搜索结果
10 条记录 (耗时 0.045 秒)