利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

9 条记录 (耗时 0.02 秒)

    Method and system for performing a hardware trace
    1.
    发明申请
    Method and system for performing a hardware trace 有权
    执行硬件跟踪的方法和系统

    公开(公告)号：US20050022068A1

    公开(公告)日：2005-01-27

    申请号：US10616635

    申请日：2003-07-10

    申请人： Michael Billeci ,  Timothy Slegel

    发明人： Michael Billeci ,  Timothy Slegel

    IPC分类号： G06F11/00 ,  G06F11/22

    CPC分类号： G06F11/2268

    摘要： An embodiment of the invention is a method for capturing hardware trace data. A wrap-back address space is defined and during compression mode, trace data is circularly stored in the wrap-back address space. Upon exiting compression mode, a write address is established for further trace data such that trace data prior to existing compression mode is maintained.

    摘要翻译： 本发明的实施例是用于捕获硬件跟踪数据的方法。 定义回绕地址空间，在压缩模式期间，跟踪数据循环存储在回绕地址空间中。 在退出压缩模式时，为进一步的跟踪数据建立写入地址，使得维持现有压缩模式之前的跟踪数据。

    METHOD AND SYSTEM FOR PERFORMING A HARDWARE TRACE
    2.
    发明申请
    METHOD AND SYSTEM FOR PERFORMING A HARDWARE TRACE 有权
    用于执行硬件跟踪的方法和系统

    公开(公告)号：US20080016409A1

    公开(公告)日：2008-01-17

    申请号：US11779561

    申请日：2007-07-18

    申请人： Michael Billeci ,  Timothy Slegel

    发明人： Michael Billeci ,  Timothy Slegel

    IPC分类号： G06F11/00

    CPC分类号： G06F11/2268

    摘要： Methods and systems for pre-detecting a hardware hang in a processor. The methods comprise maintaining a count of a number of cycles in a predefined time interval without an instruction being completed; detecting a pre-hang condition if said count is within N counts of a hang limit; initiating trace capture in response to detecting said pre-hang condition; and detecting a hang condition if said count equals said hang limit.

    摘要翻译： 用于预检测处理器中的硬件挂起的方法和系统。 所述方法包括在预定义的时间间隔内保持多个周期的计数，而不完成指令; 如果所述计数在暂停限制的N个计数内，则检测预挂起状态; 响应于检测到所述预悬挂条件而启动跟踪捕获; 并且如果所述计数等于所述挂起限制，则检测挂起状况。

    Computer instruction value field having an embedded sign
    3.
    发明申请
    Computer instruction value field having an embedded sign 审中-公开
    具有嵌入符号的计算机指令值字段

    公开(公告)号：US20060195680A1

    公开(公告)日：2006-08-31

    申请号：US11406031

    申请日：2006-04-18

    申请人： Mark Check ,  Brian Moore ,  Timothy Slegel

    发明人： Mark Check ,  Brian Moore ,  Timothy Slegel

    IPC分类号： G06F9/44

    CPC分类号： G06F9/30145 ,  G06F9/30167

    摘要： A computer machine instruction is fetched and executed, the machine instruction having a signed field value wherein the signed field value comprises contiguous bit positions 1-N consisting of a contiguous most significant value contiguous with a contiguous embedded sign field, the embedded sign field contiguous with a contiguous least significant value. Preferably, the sign field is one bit, the contiguous most significant value comprises bit position N and the least significant value comprises bit position 1 wherein N is the least significant bit of the most significant value.

    摘要翻译： 取出并执行计算机机器指令，该机器指令具有带符号的字段值，其中，有符号的字段值包括由与邻接的嵌入符号字段相邻的连续最高有效值组成的连续位位置1 -N，与 连续的最低有效值。 优选地，符号字段是一位，连续的最高有效值包括比特位置N，最低有效值包括比特位置1，其中N是最高有效值的最低有效位。

    Instruction text controlled selectively stated branches for prediction via a branch target buffer
    4.
    发明申请
    Instruction text controlled selectively stated branches for prediction via a branch target buffer 审中-公开
    指令文本通过分支目标缓冲器选择性地指定用于预测的分支

    公开(公告)号：US20050216713A1

    公开(公告)日：2005-09-29

    申请号：US10809749

    申请日：2004-03-25

    申请人： Brian Prasky ,  Mark Check ,  Bruce Giamei ,  Timothy Slegel

    发明人： Brian Prasky ,  Mark Check ,  Bruce Giamei ,  Timothy Slegel

    IPC分类号： G06F9/00 ,  G06F9/30 ,  G06F9/318 ,  G06F9/38

    CPC分类号： G06F9/30145 ,  G06F9/30181 ,  G06F9/3806

    摘要： Disclosed is a method and apparatus providing the capability to prevent particular branches from being written into the BTB, thereby making them non-predictable. By making certain branches only detectable at decode time frame, branch prediction can completely run asynchronous of decode. By allowing branch prediction logic to cover as wide a range of branches as possible, the efficiency of fetching of branch targets way before the branch itself achieves a higher level of precision. This increased level of precision eliminates pipeline stalls between branches and targets where prior concerns of creating data integrity within the pipeline of a microprocessor existed.

    摘要翻译： 公开了提供防止特定分支被写入BTB的能力的方法和装置，从而使它们不可预测。 通过使某些分支仅在解码时间帧可检测到，分支预测可以完全执行解码的异步。 通过允许分支预测逻辑覆盖尽可能广泛的分支范围，在分支本身实现更高精度之前，提取分支目标的效率。 这种增加的精度水平消除了分支和目标之间的流水线停顿，其中在微处理器管线内存在创建数据完整性的事先担心。

    System and method for creating precise exceptions
    6.
    发明申请
    System and method for creating precise exceptions 失效
    用于创建精确异常的系统和方法

    公开(公告)号：US20060179290A1

    公开(公告)日：2006-08-10

    申请号：US11055193

    申请日：2005-02-10

    申请人： Fadi Busaba ,  Michael Mack ,  John Rell ,  Eric Schwarz ,  Chung-Lung Shum ,  Timothy Slegel ,  Scott Swaney ,  Sheryll Veneracion

    发明人： Fadi Busaba ,  Michael Mack ,  John Rell ,  Eric Schwarz ,  Chung-Lung Shum ,  Timothy Slegel ,  Scott Swaney ,  Sheryll Veneracion

    IPC分类号： G06F9/44

    CPC分类号： G06F9/4812 ,  G06F9/30101 ,  G06F9/3863 ,  G06F2209/481

    摘要： A method for creating precise exceptions including checkpointing an exception causing instruction. The checkpointing results in a current checkpointed state. The current checkpointed state is locked. It is determined if any of a plurality of registers require restoration to the current checkpointed state. One or more of the registers are restored to the current checkpointed state in response to the results of the determining indicating that the one or more registers require the restoring. The execution unit is restarted at the exception handler or the next sequential instruction dependent on whether traps are enabled for the exception.

    摘要翻译： 一种用于创建精确异常的方法，包括检查指向引起异常的指令。 检查点导致当前检查点状态。 当前检查点状态被锁定。 确定多个寄存器中的任一个是否需要恢复到当前检查点状态。 响应于指示一个或多个寄存器需要恢复的确定结果，一个或多个寄存器恢复到当前检查点状态。 执行单元在异常处理程序或下一个顺序指令下重新启动，取决于是否为异常启用陷阱。