Method for making a semiconductor device with improved sidewall junction
capacitance
    1.
    发明授权
    Method for making a semiconductor device with improved sidewall junction capacitance 失效
    制造具有改善的侧壁结电容的半导体器件的方法

    公开(公告)号:US6060372A

    公开(公告)日:2000-05-09

    申请号:US823286

    申请日:1997-03-21

    摘要: A semiconductor device (10) of the present invention has a gate (32) insulatively disposed above the substrate, source and drain regions (36, 38) disposed near the surface in the substrate adjacent opposite sides of the gate (32), and a field oxide region (26) disposed in the surface of the substrate surrounding the source and drain regions (36, 38) and defining an active moat region (20). The channel stop region (24) is disposed below the field oxide region (26) and is spaced from the active moat region (20) with a predetermined spacing.

    摘要翻译: 本发明的半导体器件(10)具有绝缘地设置在衬底之上的栅极(32),源极和漏极区域(36,38)设置在邻近栅极(32)的相对侧的衬底中的表面附近,以及 设置在围绕源极和漏极区域(36,38)的基板的表面中并且限定活动的护城河区域(20)的场氧化物区域(26)。 通道停止区域(24)设置在场氧化物区域(26)的下方,并且以预定的间隔与活动的护壕区域(20)间隔开。