Compiler and runtime for heterogeneous multiprocessor systems
    1.
    发明授权
    Compiler and runtime for heterogeneous multiprocessor systems 有权
    异构多处理器系统的编译器和运行时

    公开(公告)号:US08296743B2

    公开(公告)日:2012-10-23

    申请号:US11958307

    申请日:2007-12-17

    IPC分类号: G06F9/45

    CPC分类号: G06F9/505 G06F2209/5017

    摘要: Presented are embodiments of methods and systems for library-based compilation and dispatch to automatically spread computations of a program across heterogeneous cores in a processing system. The source program contains a parallel-programming keyword, such as mapreduce, from a high-level, library-oriented parallel programming language. The compiler inserts one or more calls for a generic function, associated with the parallel-programming keyword, into the compiled code. A runtime library provides a predicate-based library system that includes multiple hardware specific implementations (“variants”) of the generic function. A runtime dispatch engine dynamically selects the best-available (e.g., most specific) variant, from a bundle of hardware-specific variants, for a given input and machine configuration. That is, the dispatch engine may take into account run-time availability of processing elements, choose one of them, and then select for dispatch an appropriate variant to be executed on the selected processing element. Other embodiments are also described and claimed.

    摘要翻译: 提出了用于基于库的编译和调度的方法和系统的实施例,以便在处理系统中跨异构核心自动扩展程序的计算。 源程序包含一个并行编程关键字,如mapreduce,来自高级的面向库的并行编程语言。 编译器将一个或多个与并行编程关键字关联的通用函数的调用插入到编译代码中。 运行时库提供了一个基于谓词的库系统,其中包含通用功能的多个硬件特定实现(变体)。 对于给定的输入和机器配置,运行时调度引擎从一组特定于硬件的变体动态地选择最佳可用(例如,最具体的)变体。 也就是说,调度引擎可以考虑处理元件的运行时间可用性,选择其中之一,然后选择在所选择的处理元件上调度要执行的适当变体。 还描述和要求保护其他实施例。

    Compiler and Runtime for Heterogeneous Multiprocessor Systems
    2.
    发明申请
    Compiler and Runtime for Heterogeneous Multiprocessor Systems 有权
    用于异构多​​处理器系统的编译器和运行时

    公开(公告)号:US20090158248A1

    公开(公告)日:2009-06-18

    申请号:US11958307

    申请日:2007-12-17

    IPC分类号: G06F9/44

    CPC分类号: G06F9/505 G06F2209/5017

    摘要: Presented are embodiments of methods and systems for library-based compilation and dispatch to automatically spread computations of a program across heterogeneous cores in a processing system. The source program contains a parallel-programming keyword, such as mapreduce, from a high-level, library-oriented parallel programming language. The compiler inserts one or more calls for a generic function, associated with the parallel-programming keyword, into the compiled code. A runtime library provides a predicate-based library system that includes multiple hardware specific implementations (“variants”) of the generic function. A runtime dispatch engine dynamically selects the best-available (e.g., most specific) variant, from a bundle of hardware-specific variants, for a given input and machine configuration. That is, the dispatch engine may take into account run-time availability of processing elements, choose one of them, and then select for dispatch an appropriate variant to be executed on the selected processing element. Other embodiments are also described and claimed.

    摘要翻译: 提出了用于基于库的编译和调度的方法和系统的实施例,以便在处理系统中跨异构核心自动扩展程序的计算。 源程序包含一个并行编程关键字,如mapreduce,来自高级的面向库的并行编程语言。 编译器将一个或多个与并行编程关键字关联的通用函数的调用插入到编译代码中。 运行时库提供了一个基于谓词的库系统,它包含通用函数的多个硬件特定实现(“变体”)。 对于给定的输入和机器配置,运行时调度引擎从一组特定于硬件的变体动态地选择最佳可用(例如,最具体的)变体。 也就是说,调度引擎可以考虑处理元件的运行时间可用性,选择其中之一,然后选择在所选择的处理元件上调度要执行的适当变体。 还描述和要求保护其他实施例。

    Providing a dedicated communication path for compliant sequencers
    7.
    发明申请
    Providing a dedicated communication path for compliant sequencers 有权
    为顺应性排序器提供专门的通信路径

    公开(公告)号:US20090077348A1

    公开(公告)日:2009-03-19

    申请号:US11901178

    申请日:2007-09-14

    IPC分类号: G06F15/76 G06F9/02

    摘要: In one embodiment, the present invention includes a method for communicating an assertion signal from a first instruction sequencer to a plurality of accelerators coupled to the first instruction sequencer via a dedicated interconnect, detecting the assertion signal in the accelerators and communicating a request for a lock on a second interconnect coupled to the first instruction sequencer and the accelerators, and registering an accelerator that achieves the lock by communication of a registration message for the accelerator to the first instruction sequencer via the second interconnect. Other embodiments are described and claimed.

    摘要翻译: 在一个实施例中,本发明包括一种用于将断言信号从第一指令定序器传送到经由专用互连耦合到第一指令定序器的多个加速器的方法,检测加速器中的断言信号并传送锁定请求 在耦合到所述第一指令定序器和所述加速器的第二互连上,以及通过经由所述第二互连将所述加速器的用于所述加速器的注册消息通信到所述第一指令定序器来登记实现所述锁定的加速器。 描述和要求保护其他实施例。

    Methods and apparatuses for thread management of mult-threading
    10.
    发明申请
    Methods and apparatuses for thread management of mult-threading 审中-公开
    多线程线程管理方法与设备

    公开(公告)号:US20050071841A1

    公开(公告)日:2005-03-31

    申请号:US10676581

    申请日:2003-09-30

    IPC分类号: G06F9/45 G06F9/46

    CPC分类号: G06F8/441

    摘要: Methods and apparatuses for thread management for multi-threading are described herein. In one embodiment, exemplary process includes selecting, during a compilation of code having one or more threads executable in a data processing system, a current thread having a most bottom order, determining resources allocated to one or more child threads spawned from the current thread, and allocating resources for the current thread in consideration of the resources allocated to the current thread's one or more child threads to avoid resource conflicts between the current thread and its one or more child threads. Other methods and apparatuses are also described.

    摘要翻译: 本文描述了用于多线程的线程管理的方法和装置。 在一个实施例中,示例性过程包括在具有在数据处理系统中可执行的一个或多个线程的代码的编译期间选择具有最低阶的当前线程,确定分配给从当前线程产生的一个或多个子线程的资源, 并且考虑分配给当前线程的一个或多个子线程的资源来为当前线程分配资源,以避免当前线程与其一个或多个子线程之间的资源冲突。 还描述了其它方法和装置。