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168 条记录 (耗时 0.034 秒)

    PLL lock detection circuit using edge detection
    1.
    发明申请
    PLL lock detection circuit using edge detection 有权

    公开(公告)号：US20050012524A1

    公开(公告)日：2005-01-20

    申请号：US10622627

    申请日：2003-07-17

    申请人： Michael Green ,  Nhat Nguyen ,  Yohan Frans ,  Dennis Kim ,  Todd Bystrom

    发明人： Michael Green ,  Nhat Nguyen ,  Yohan Frans ,  Dennis Kim ,  Todd Bystrom

    IPC分类号： H03D13/00

    CPC分类号： H03D13/003

    摘要： A lock detection circuit operatively associated with a phase-locked loop indicates when a feedback clock signal is locked to a reference clock signal. The lock detection circuit counts the number of rising and falling edges of the feedback clock signal that are detected between rising edges of the reference clock cycle. The lock detection circuit counts the number of consecutive valid cycles of the reference clock signal during which a single rising edge and a single falling edge of the feedback clock signal are detected. Lock detection circuit asserts a lock signal when the number of consecutive valid cycles counted exceeds a predetermined number. Where the lock detection circuit indicates locked signals and then detects a reference clock cycle that is not valid, lock detection circuit continues to indicate lock if the next reference clock cycle is valid relative to a skewed feedback clock signal.

    PLL lock detection circuit using edge detection and a state machine
    2.
    发明申请
    PLL lock detection circuit using edge detection and a state machine 失效
    PLL锁定检测电路采用边缘检测和状态机

    公开(公告)号：US20050162199A1

    公开(公告)日：2005-07-28

    申请号：US11088152

    申请日：2005-03-23

    申请人： Michael Green ,  Nhat Nguyen ,  Yohan Frans ,  Dennis Kim ,  Todd Bystrom

    发明人： Michael Green ,  Nhat Nguyen ,  Yohan Frans ,  Dennis Kim ,  Todd Bystrom

    IPC分类号： H03D13/00 ,  H03L7/06

    CPC分类号： H03D13/003

    摘要： A lock detection circuit operatively associated with a phase-locked loop indicates when a feedback clock signal is locked to a reference clock signal. The lock detection circuit counts the number of rising and falling edges of the feedback clock signal that are detected between rising edges of the reference clock cycle. The lock detection circuit counts the number of consecutive valid cycles of the reference clock signal during which a single rising edge and a single falling edge of the feedback clock signal are detected. Lock detection circuit uses a state machine to assert a lock signal when the number of consecutive valid cycles counted exceeds a predetermined number. Where the lock detection circuit indicates locked signals and then detects a reference clock cycle that is not valid, lock detection circuit continues to indicate lock if the next reference clock cycle is valid relative to a skewed feedback clock signal.

    摘要翻译： 与锁相环可操作地相关联的锁定检测电路指示何时将反馈时钟信号锁定到参考时钟信号。 锁定检测电路对在参考时钟周期的上升沿之间检测到的反馈时钟信号的上升沿和下降沿的数量进行计数。 锁定检测电路对在其中检测到反馈时钟信号的单个上升沿和单个下降沿的参考时钟信号的连续有效周期的数量进行计数。 当连续的有效周期数超过预定数量时，锁定检测电路使用状态机来声明锁定信号。 如果锁定检测电路指示锁定信号，然后检测到无效的参考时钟周期，则如果下一个参考时钟周期相对于偏斜反馈时钟信号有效，锁定检测电路将继续指示锁定。

    PLL lock detection circuit using edge detection
    3.
    发明授权
    PLL lock detection circuit using edge detection 有权
    PLL锁定检测电路采用边缘检测

    公开(公告)号：US06879195B2

    公开(公告)日：2005-04-12

    申请号：US10622627

    申请日：2003-07-17

    申请人： Michael Green ,  Nhat M. Nguyen ,  Yohan Frans ,  Dennis Kim ,  Todd Bystrom

    发明人： Michael Green ,  Nhat M. Nguyen ,  Yohan Frans ,  Dennis Kim ,  Todd Bystrom

    IPC分类号： H03D13/00 ,  H03L7/06

    CPC分类号： H03D13/003

    摘要： A lock detection circuit operatively associated with a phase-locked loop indicates when a feedback clock signal is locked to a reference clock signal. The lock detection circuit counts the number of rising and falling edges of the feedback clock signal that are detected between rising edges of the reference clock cycle. The lock detection circuit counts the number of consecutive valid cycles of the reference clock signal during which a single rising edge and a single falling edge of the feedback clock signal are detected. Lock detection circuit asserts a lock signal when the number of consecutive valid cycles counted exceeds a predetermined number. Where the lock detection circuit indicates locked signals and then detects a reference clock cycle that is not valid, lock detection circuit continues to indicate lock if the next reference clock cycle is valid relative to a skewed feedback clock signal.

    摘要翻译： 与锁相环可操作地相关联的锁定检测电路指示何时将反馈时钟信号锁定到参考时钟信号。 锁定检测电路对在参考时钟周期的上升沿之间检测到的反馈时钟信号的上升沿和下降沿的数量进行计数。 锁定检测电路对在其中检测到反馈时钟信号的单个上升沿和单个下降沿的参考时钟信号的连续有效周期的数量进行计数。 当连续的有效周期数超过预定数量时，锁定检测电路断言锁定信号。 如果锁定检测电路指示锁定信号，然后检测到无效的参考时钟周期，则如果下一个参考时钟周期相对于偏斜反馈时钟信号有效，锁定检测电路将继续指示锁定。

    PLL lock detection circuit using edge detection and a state machine
    4.
    发明授权
    PLL lock detection circuit using edge detection and a state machine 失效
    PLL锁定检测电路采用边缘检测和状态机

    公开(公告)号：US07084681B2

    公开(公告)日：2006-08-01

    申请号：US11088152

    申请日：2005-03-23

    申请人： Michael Green ,  Nhat M. Nguyen ,  Yohan Frans ,  Dennis Kim ,  Todd Bystrom

    发明人： Michael Green ,  Nhat M. Nguyen ,  Yohan Frans ,  Dennis Kim ,  Todd Bystrom

    IPC分类号： H03L7/06

    CPC分类号： H03D13/003

    摘要： A lock detection circuit operatively associated with a phase-locked loop indicates when a feedback clock signal is locked to a reference clock signal. The lock detection circuit counts the number of rising and falling edges of the feedback clock signal that are detected between rising edges of the reference clock cycle. The lock detection circuit counts the number of consecutive valid cycles of the reference clock signal during which a single rising edge and a single falling edge of the feedback clock signal are detected. Lock detection circuit uses a state machine to assert a lock signal when the number of consecutive valid cycles counted exceeds a predetermined number. Where the lock detection circuit indicates locked signals and then detects a reference clock cycle that is not valid, the lock detection circuit continues to indicate lock if the next reference clock cycle is valid relative to a skewed feedback clock signal.

    摘要翻译： 与锁相环可操作地相关联的锁定检测电路指示何时将反馈时钟信号锁定到参考时钟信号。 锁定检测电路对在参考时钟周期的上升沿之间检测到的反馈时钟信号的上升沿和下降沿的数量进行计数。 锁定检测电路对在其中检测到反馈时钟信号的单个上升沿和单个下降沿的参考时钟信号的连续有效周期的数量进行计数。 当连续的有效周期数超过预定数量时，锁定检测电路使用状态机来声明锁定信号。 如果锁定检测电路指示锁定信号，然后检测到无效的参考时钟周期，则如果下一个参考时钟周期相对于偏斜反馈时钟信号有效，则锁定检测电路继续指示锁定。

    Pre-rolled smoking paper stuffer
    6.
    发明授权
    Pre-rolled smoking paper stuffer 有权

    公开(公告)号：US09999244B2

    公开(公告)日：2018-06-19

    申请号：US15149078

    申请日：2016-05-06

    申请人： Michael Green

    发明人： Michael Green

    IPC分类号： A24F5/02 ,  A24C5/02

    CPC分类号： A24C5/02 ,  A24C5/40

    摘要： A Pre-Rolled Smoking Paper Stuffer has a chimney which includes a separator wall bin, converging guide, cradle, tip spacer, and base walls and an extractor base which includes an extractor block, alignment block, and tip pusher. A smoking paper can be inserted into the cradle. Smoking materials are placed into the bin and flow out of the bin and into the converging guide which funnels them into the smoking paper held within the cradle. Once filled, the chimney is pressed onto the base and the alignment block aligns the tip pusher with the smoking-end of the paper. As the chimney continues to be pushed down, the tip pusher displaces the filled smoking paper up and out of the top of the cradle. The stuffed paper can be grasped and lifted out of the stuffer. Multiple stuffers can be attached to one another via the use of various attachment means.

    Transmission obscuring cover device
    9.
    发明授权
    Transmission obscuring cover device 有权
    传输模糊盖装置

    公开(公告)号：US09305538B2

    公开(公告)日：2016-04-05

    申请号：US14303783

    申请日：2014-06-13

    申请人： Alica Tyson ,  Michael Green

    发明人： Alica Tyson ,  Michael Green

    IPC分类号： G01S1/72 ,  G10K11/16

    CPC分类号： G10K11/16 ,  H04M1/19

    摘要： A transmission obscuring cover device obscures video and audio transmissions from an electronic apparatus. The device includes a panel having a bottom surface. An adhesive is coupled to the bottom surface for being adhered to an electronic apparatus. The panel is a sound absorber wherein the panel is configured for being positioned over a microphone of the electronic apparatus to inhibit transmission of sound to the microphone.

    摘要翻译： 传输模糊覆盖设备遮蔽来自电子设备的视频和音频传输。 该装置包括具有底面的面板。 粘合剂连接到底表面以便粘附到电子设备上。 面板是吸声器，其中面板被配置为定位在电子设备的麦克风上方以阻止声音传播到麦克风。