摘要:
A video image storage, processing, and distribution system is provided with a processing and a distribution subsystem. The processing subsystem comprises at least one high performance video signal input device, one recording format independent hierarchy of storage, at least one recording format and resolution independent video data processor, and a high performance digital data recorder. The distribution subsystem comprises an archive library of recording format independent high performance digital tapes and instrument data players, a recording format independent hierarchy of staging storage, at least one recording format independent video distribution control processor, and a RF signal generation subsystem. The hierarchical storage of the processing subsystem comprises a first level of high performance random access mass storage amenable to large volume storage and high performance file transfers, and a second level of high performance random access storage amenable to high performance byte manipulations. The hierarchical staging storage comprises a first level of high performance random access storage amenable to high performance file transfers. Together, these elements cooperate to store, process, and distribute a high volume of video data on demand.
摘要:
A method and system for operating a DRAM device in either a high power, full density mode or a low power, half density mode. In the full density mode, each data bit is stored in a single memory cell, and, in the half density mode, each data bit is stored in two memory cells that are refreshed at the same time to permit a relatively slow refresh rate. When transitioning from the full density mode to the half density mode, data are copied from each row of memory cells storing data to an adjacent row of memory cells. The adjacent row of memory cells are made free to store data from an adjacent row by remapping the most significant bit of the row address to the least significant bit of the row address, and then remapping all of the remaining bits of the row address to the next highest order bit.
摘要:
An end shield for an electric motor is provided with an integrally formed component compartment. The component compartment is mounted on a peripheral edge of the end shield. The component compartment has a hollow interior volume and a motor component used for controlling operation of the motor is received in the component compartment. The motor component is housed and protected in the component compartment.
摘要:
A blower motor housing for a fuel burner has a generally "cup" shaped configuration with an open end that communicates with an opening in a side wall of a burner housing. The motor housing is mounted to the burner housing with the open end in register with the opening in the burner housing, thereby joining the interior of the motor housing with the interior of the burner housing. The electric motor is mounted within the motor housing with at least a portion of the stator winding extending axially beyond the open end of the motor housing and into the interior of the burner housing. A squirrel cage blower wheel is mounted to the motor shaft substantially concentric with the stator winding and extends at least partially along the axial length of the stator winding so that, during operation of the burner, cool intake air is moved past the stator winding as it is drawn into the blower wheel.
摘要:
A mechanism is provided for the user to define a circuit design intent or strategy in the form of data that is stored with the design database. An autorouter then uses this guidance from the user to create a plan for routing the design. The user can then modify their guidance to the router until the results for the plan are acceptable. Using the planned flow, the autorouter can complete the design, creating detailed paths including etch segments and vias. Allowing such interaction with an autorouter significantly reduces the routing time and hence time-to-market.
摘要:
A method and system for operating a DRAM device in either a high power, full density mode or a low power, half density mode. In the full density mode, each data bit is stored in a single memory cell, and, in the half density mode, each data bit is stored in two memory cells that are refreshed at the same time to permit a relatively slow refresh rate. When transitioning from the full density mode to the half density mode, data are copied from each row of memory cells storing data to an adjacent row of memory cells. The adjacent row of memory cells are made free to store data from an adjacent row by remapping the most significant bit of the row address to the least significant bit of the row address, and then remapping all of the remaining bits of the row address to the next highest order bit.
摘要:
A memory integrated circuit can be used either alone or as a pair to provide a memory device having twice the capacity of the single integrated circuit. The larger capacity memory device is addressed using an extra row address bit. The extra row address bit is used either to alternately enable each of the memory integrated circuits in one configuration or is remapped to become an extra column address bit in another configuration.
摘要:
An improved method for certifying service/product providers. This is accomplished by first determining the requirements of operation of such service/product provider, such as insurance coverage, bonding information and the like. These requirements are then verified as being met so that a consumer or business partner need not know or verify the requirements, or verify that the requirements have been sufficiently satisfied. Once all the requirements of the service/product provider are verified by the certifier, the service/product provider's name and other selected information can be published so that potential customers, business partners and/or employers can more easily find the service/product providers which meet not only their needs, but service/product providers which meet all of the legal and regulatory requirements that may be applicable in a given field, geographical area or other subset of the business community.
摘要:
A method and system for operating a DRAM device in either a high power, full density mode or a low power, half density mode. In the full density mode, each data bit is stored in a single memory cell, and, in the half density mode, each data bit is stored in two memory cells that are refreshed at the same time to permit a relatively slow refresh rate. When transitioning from the full density mode to the half density mode, data are copied from each row of memory cells storing data to an adjacent row of memory cells. The adjacent row of memory cells are made free to store data from an adjacent row by remapping the most significant bit of the row address to the least significant bit of the row address, and then remapping all of the remaining bits of the row address to the next highest order bit.
摘要:
An induction motor system operable in a wet environment comprises an induction motor and an apparatus for controlling the speed of the motor. The motor is adapted to be coupled to an AC source for supplying an AC signal. The motor includes a rotor having rotor laminations. The reflected rotor resistance over reflected rotor reactance ratio of the motor is adjusted to be greater than one. The controlling apparatus includes a switching device, user controls, controller means and isolation means. The switching device is connected in series with the motor and is operative in either a high impedance state wherein significant current flow through the motor is prevented or a low impedance state wherein current flow through the motor is substantially undisturbed. The user controls provide motor speed input signals. The controller means receives the motor speed input signals from the user controls, and switches the switching device between its low and high impedance states in a predetermined sequence for inducing a phase angle delay in the AC signal. The isolation means electrically isolates the controller means from the AC source and includes coupling means for optically coupling the switching device to the controller means.