公开(公告)号：US20140210007A1

公开(公告)日：2014-07-31

申请号：US14167331

申请日：2014-01-29

Applicant: Microchip Technology Incorporated

Inventor： Philippe Deval ,  Marija Fernandez ,  Patrick Besseux ,  Rohan Braithwaite

IPC: H01L27/02 ,  H01L27/12

CPC classification number: H01L27/0266 ,  H01L27/1203 ,  H01L29/7393 ,  H01L29/7436

Abstract: A double-diffused metal oxide semiconductor (DMOS) structure is configured as an open drain output driver having electrostatic discharge (ESD) protection and a reverse voltage blocking diode inherent in the structure and without requiring metal connections for the ESD and reverse voltage blocking diode protections.

Abstract translation: 双扩散金属氧化物半导体（DMOS）结构被配置为具有静电放电（ESD）保护的开漏输出驱动器和结构固有的反向电压阻断二极管，并且不需要金属连接用于ESD和反向电压阻塞二极管保护 。

公开(公告)号：US20180226469A1

公开(公告)日：2018-08-09

申请号：US15885948

申请日：2018-02-01

Applicant: Microchip Technology Incorporated

Inventor： Randy Yach ,  Rohan Braithwaite

IPC: H01L49/02 ,  H01L29/94

CPC classification number: H01L28/60 ,  H01G4/10 ,  H01G4/1272 ,  H01G4/33 ,  H01L28/40 ,  H01L29/94

Abstract: A capacitor structure may include a lower conducting layer (e.g., poly 1 layer) and an upper conducting layer (e.g., overlying poly 2 layer), which define an anode and cathode, and a dielectric layer (e.g., an ONO layer stack) located between the upper conducting layer and the lower conducting layer, wherein a portion of the dielectric layer (e.g., at least the nitride layer of the ONO layer stack) extends beyond a lateral edge of the upper conducting layer. A method forming such capacitor structure may utilize a spacer adjacent the lateral edge of the upper conducting layer and over the first portion of the dielectric layer, performing an etch to remove a first portion of the dielectric layer but protect a second portion located below the spacer and extending laterally beyond an edge of the upper conducting layer.

公开(公告)号：US09607978B2

公开(公告)日：2017-03-28

申请号：US14167331

申请日：2014-01-29

Applicant: Microchip Technology Incorporated

Inventor： Philippe Deval ,  Marija Fernandez ,  Patrick Besseux ,  Rohan Braithwaite

IPC: H01L27/02 ,  H01L29/66 ,  H01L27/12 ,  H01L29/739 ,  H01L29/74

CPC classification number: H01L27/0266 ,  H01L27/1203 ,  H01L29/7393 ,  H01L29/7436

Abstract: A double-diffused metal oxide semiconductor (DMOS) structure is configured as an open drain output driver having electrostatic discharge (ESD) protection and a reverse voltage blocking diode inherent in the structure and without requiring metal connections for the ESD and reverse voltage blocking diode protections.

公开(公告)号：US10418438B2

公开(公告)日：2019-09-17

申请号：US15885948

申请日：2018-02-01

Applicant: Microchip Technology Incorporated

Inventor： Randy Yach ,  Rohan Braithwaite

IPC: H01L29/94 ,  H01L49/02 ,  H01G4/33 ,  H01G4/10 ,  H01G4/12

Abstract: A capacitor structure may include a lower conducting layer (e.g., poly 1 layer) and an upper conducting layer (e.g., overlying poly 2 layer), which define an anode and cathode, and a dielectric layer (e.g., an ONO layer stack) located between the upper conducting layer and the lower conducting layer, wherein a portion of the dielectric layer (e.g., at least the nitride layer of the ONO layer stack) extends beyond a lateral edge of the upper conducting layer. A method forming such capacitor structure may utilize a spacer adjacent the lateral edge of the upper conducting layer and over the first portion of the dielectric layer, performing an etch to remove a first portion of the dielectric layer but protect a second portion located below the spacer and extending laterally beyond an edge of the upper conducting layer.