Abstract:
A LIN receiver includes a single, low power structure for both sleep and silent modes, with a single comparator for detecting LIN signaling during both sleep and silent modes as well as during active mode. In some embodiments, full receiving capability is implemented with a current as low as 5 microamps. In particular, dominant and recessive levels for the wakeup bloc are identical to those of standard LIN levels, fixed at about 3.5 V. Consequently, full LIN receiving capability is available during sleep mode.
Abstract:
A double-diffused metal oxide semiconductor (DMOS) structure is configured as an open drain output driver having electrostatic discharge (ESD) protection and a reverse voltage blocking diode inherent in the structure and without requiring metal connections for the ESD and reverse voltage blocking diode protections.
Abstract:
A LIN receiver includes a single, low power structure for both sleep and silent modes, with a single comparator for detecting LIN signaling during both sleep and silent modes as well as during active mode. In some embodiments, full receiving capability is implemented with a current as low as 5 microamps. In particular, dominant and recessive levels for the wakeup bloc are identical to those of standard LIN levels, fixed at about 3.5 V. Consequently, full LIN receiving capability is available during sleep mode.
Abstract:
A clock oscillator includes a high speed oscillator generating a high speed clock signal and comprising a digital trimming function; a counter receiving said high speed clock signal at a clock input; a time base having a low drift and controlling said counter, wherein the counter generates a difference between a reference value and a counter value; and a digital integrator receiving said difference value and providing trimming data for said high speed oscillator.
Abstract:
A clock oscillator includes a high speed oscillator generating a high speed clock signal and comprising a digital trimming function; a counter receiving said high speed clock signal at a clock input; a time base having a low drift and controlling said counter, wherein the counter generates a difference between a reference value and a counter value; and a digital integrator receiving said difference value and providing trimming data for said high speed oscillator.
Abstract:
A double-diffused metal oxide semiconductor (DMOS) structure is configured as an open drain output driver having electrostatic discharge (ESD) protection and a reverse voltage blocking diode inherent in the structure and without requiring metal connections for the ESD and reverse voltage blocking diode protections.