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公开(公告)号：US11829758B2
公开(公告)日：2023-11-28
申请号：US18120532
申请日：2023-03-13
Applicant: Micron Technology, Inc.
Inventor： Skyler Arron Windh , Gongyu Wang
CPC classification number: G06F9/30058 , G06F8/4441 , G06F8/451 , G06F9/3004 , G06F9/30036 , G06F9/3838
Abstract: Disclosed in some examples, are systems, methods, devices, and machine readable mediums which use improved dynamic programming algorithms to pack conditional branch instructions. Conditional code branches may be modeled as directed acyclic graphs (DAGs) which have a topological ordering. These DAGs may be used to construct a dynamic programming table to find a partial mapping of one path onto the other path using dynamic programming algorithms.
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公开(公告)号：US20250094365A1
公开(公告)日：2025-03-20
申请号：US18970417
申请日：2024-12-05
Applicant: Micron Technology, Inc.
Inventor： Gongyu Wang , Jason Eckhardt
Abstract: A reconfigurable compute fabric can include multiple nodes, and each node can include multiple tiles with respective processing and storage elements. Compute kernels can be parsed into directed graphs and mapped to particular node or tile resources for execution. In an example, a branch-and-bound search algorithm can be used to perform the mapping. The algorithm can use a cost function to evaluate the resources based on capability, occupancy, or power consumption of the various node or tile resources.
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公开(公告)号：US12174760B2
公开(公告)日：2024-12-24
申请号：US18211473
申请日：2023-06-19
Applicant: Micron Technology, Inc.
Inventor： Gongyu Wang , Jason Eckhardt
Abstract: A reconfigurable compute fabric can include multiple nodes, and each node can include multiple tiles with respective processing and storage elements. Compute kernels can be parsed into directed graphs and mapped to particular node or tile resources for execution. In an example, a branch-and-bound search algorithm can be used to perform the mapping. The algorithm can use a cost function to evaluate the resources based on capability, occupancy, or power consumption of the various node or tile resources.
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公开(公告)号：US20230067771A1
公开(公告)日：2023-03-02
申请号：US17407502
申请日：2021-08-20
Applicant: Micron Technology, Inc.
Inventor： Douglas Vanesko , Tony M. Brewer , Gongyu Wang
Abstract: A reconfigurable compute fabric can include multiple nodes, and each node can include multiple tiles with respective processing and storage elements. A first tile in a first node can include a processor with a processor output and a first register network configured to receive information from the processor output and information from one or more of the multiple other tiles in the first node. In response to an output instruction and a delay instruction, the register network can provide an output signal to one of the multiple other tiles in the first node. Based on the output instruction, the output signal can include one or the other of the information from the processor output and the information from one or more of the multiple other tiles in the first node. A timing characteristic of the output signal can depend on the delay instruction.
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公开(公告)号：US11860800B2
公开(公告)日：2024-01-02
申请号：US17407486
申请日：2021-08-20
Applicant: Micron Technology, Inc.
Inventor： Gongyu Wang , Jason Eckhardt
CPC classification number: G06F13/1668 , G06F13/161 , G06F13/4022 , G06F15/7825 , G06N7/01
Abstract: A reconfigurable compute fabric can include multiple nodes, and each node can include multiple tiles with respective processing and storage elements. Compute kernels can be parsed into directed graphs and mapped to particular node or tile resources for execution. In an example, a branch-and-bound search algorithm can be used to perform the mapping. The algorithm can use a cost function to evaluate the resources based on capability, occupancy, or power consumption of the various node or tile resources.
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Patent Agency Ranking
公开(公告)号：US20230059948A1
公开(公告)日：2023-02-23
申请号：US17407486
申请日：2021-08-20
Applicant: Micron Technology, Inc.
Inventor： Gongyu Wang , Jason Eckhardt
Abstract: A reconfigurable compute fabric can include multiple nodes, and each node can include multiple tiles with respective processing and storage elements. Compute kernels can be parsed into directed graphs and mapped to particular node or tile resources for execution. In an example, a branch-and-bound search algorithm can be used to perform the mapping. The algorithm can use a cost function to evaluate the resources based on capability, occupancy, or power consumption of the various node or tile resources.
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公开(公告)号：US20230052450A1
公开(公告)日：2023-02-16
申请号：US17399878
申请日：2021-08-11
Applicant: Micron Technology, Inc.
Inventor： Skyler Arron Windh , Gongyu Wang
Abstract: Disclosed in some examples, are systems, methods, devices, and machine readable mediums which use improved dynamic programming algorithms to pack conditional branch instructions. Conditional code branches may be modeled as directed acyclic graphs (DAGs) which have a topological ordering. These DAGs may be used to construct a dynamic programming table to find a partial mapping of one path onto the other path using dynamic programming algorithms.
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公开(公告)号：US20230333997A1
公开(公告)日：2023-10-19
申请号：US18211473
申请日：2023-06-19
Applicant: Micron Technology, Inc.
Inventor： Gongyu Wang , Jason Eckhardt
CPC classification number: G06F13/1668 , G06F13/161 , G06F15/7825 , G06F13/4022 , G06N7/01
Abstract: A reconfigurable compute fabric can include multiple nodes, and each node can include multiple tiles with respective processing and storage elements. Compute kernels can be parsed into directed graphs and mapped to particular node or tile resources for execution. In an example, a branch-and-bound search algorithm can be used to perform the mapping. The algorithm can use a cost function to evaluate the resources based on capability, occupancy, or power consumption of the various node or tile resources.
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公开(公告)号：US20230214219A1
公开(公告)日：2023-07-06
申请号：US18120532
申请日：2023-03-13
Applicant: Micron Technology, Inc.
Inventor： Skyler Arron Windh , Gongyu Wang
CPC classification number: G06F9/30058 , G06F9/30036 , G06F9/3004 , G06F9/3838 , G06F8/4441 , G06F8/451
Abstract: Disclosed in some examples, are systems, methods, devices, and machine readable mediums which use improved dynamic programming algorithms to pack conditional branch instructions. Conditional code branches may be modeled as directed acyclic graphs (DAGs) which have a topological ordering. These DAGs may be used to construct a dynamic programming table to find a partial mapping of one path onto the other path using dynamic programming algorithms.
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公开(公告)号：US11675588B2
公开(公告)日：2023-06-13
申请号：US17407502
申请日：2021-08-20
Applicant: Micron Technology, Inc.
Inventor： Douglas Vanesko , Tony M. Brewer , Gongyu Wang
CPC classification number: G06F9/30079 , G06F7/523 , G06F9/30 , G06F9/3005 , G06F9/30076 , G06F15/7867
Abstract: A reconfigurable compute fabric can include multiple nodes, and each node can include multiple tiles with respective processing and storage elements. A first tile in a first node can include a processor with a processor output and a first register network configured to receive information from the processor output and information from one or more of the multiple other tiles in the first node. In response to an output instruction and a delay instruction, the register network can provide an output signal to one of the multiple other tiles in the first node. Based on the output instruction, the output signal can include one or the other of the information from the processor output and the information from one or more of the multiple other tiles in the first node. A timing characteristic of the output signal can depend on the delay instruction.
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