公开(公告)号：US20230062092A1

公开(公告)日：2023-03-02

申请号：US17460984

申请日：2021-08-30

Applicant: Micron Technology, Inc.

Inventor： Hyuck Soo Yang ,  Sau Ha Cheung ,  Richard Beeler ,  Ping Chieh Chiang ,  Hyoung Lee ,  Jaydip Guha ,  Soichi Sugiura

IPC: H01L27/108 ,  H01L29/51

Abstract: A recessed access device comprises a conductive gate in a trench in semiconductor material. A gate insulator extends along sidewalls and around a bottom of the conductive gate between the conductive gate and the semiconductor material. A pair of source/drain regions are in upper portions of the semiconductor material on opposing lateral sides of the trench. A channel region in the semiconductor material below the pair of source/drain regions extends along sidewalls and around a bottom of the trench. The gate insulator comprises a low-k material and a high-k material. The low-k material is characterized by its dielectric constant k being no greater than 4.0. The high-k material is both (a) and (b), where: (a): characterized by its dielectric constant k being greater than 4.0; and (b): comprising SixMyO, where “M” is one or more of Al, metal(s) from Group 2, Group 3, Group 4, Group 5, and the lanthanide series of the periodic table; “x” is 0.999 to 0.6; and “y” is 0.001 to 0.4; the SixMyO being above the low-k material. Other embodiments, including method, are disclosed.

公开(公告)号：US20230141716A1

公开(公告)日：2023-05-11

申请号：US17453727

申请日：2021-11-05

Applicant: Micron Technology, Inc.

Inventor： Hyuck Soo Yang ,  Byung Yoon Kim ,  Yong Mo Yang ,  Shivani Srivastava

IPC: H01L27/088 ,  H01L29/423 ,  H01L21/28 ,  H01L21/8234

CPC classification number: H01L27/0886 ,  H01L29/42364 ,  H01L21/28194 ,  H01L21/823431 ,  H01L21/823462 ,  H01L27/10897

Abstract: Fin field effect transistors (FinFETs) having various different thicknesses of gate oxides and related apparatuses, methods, and computing systems are disclosed. An apparatus includes first FinFETs, second FinFETs, and third FinFETs. The first FinFETs include a first gate oxide material, a second gate oxide material, and a third gate oxide material. The second FinFETs include the second gate oxide material and the third gate oxide material. The third FinFETs include the third gate oxide material. A method includes forming the first gate oxide material on first fins, second fins, and third fins; removing the first gate oxide material from the second fins and the third fins; forming a second gate oxide material over the first fins, the second fins, and the third fins; and removing the second gate oxide material from the third fins.

公开(公告)号：US12199094B2

公开(公告)日：2025-01-14

申请号：US17453727

申请日：2021-11-05

Applicant: Micron Technology, Inc.

Inventor： Hyuck Soo Yang ,  Byung Yoon Kim ,  Yong Mo Yang ,  Shivani Srivastava

IPC: H01L27/088 ,  H01L21/28 ,  H01L21/8234 ,  H01L29/423 ,  H10B12/00

Abstract: Fin field effect transistors (FinFETs) having various different thicknesses of gate oxides and related apparatuses, methods, and computing systems are disclosed. An apparatus includes first FinFETs, second FinFETs, and third FinFETs. The first FinFETs include a first gate oxide material, a second gate oxide material, and a third gate oxide material. The second FinFETs include the second gate oxide material and the third gate oxide material. The third FinFETs include the third gate oxide material. A method includes forming the first gate oxide material on first fins, second fins, and third fins; removing the first gate oxide material from the second fins and the third fins; forming a second gate oxide material over the first fins, the second fins, and the third fins; and removing the second gate oxide material from the third fins.