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公开(公告)号:US20230062092A1
公开(公告)日:2023-03-02
申请号:US17460984
申请日:2021-08-30
Applicant: Micron Technology, Inc.
Inventor: Hyuck Soo Yang , Sau Ha Cheung , Richard Beeler , Ping Chieh Chiang , Hyoung Lee , Jaydip Guha , Soichi Sugiura
IPC: H01L27/108 , H01L29/51
Abstract: A recessed access device comprises a conductive gate in a trench in semiconductor material. A gate insulator extends along sidewalls and around a bottom of the conductive gate between the conductive gate and the semiconductor material. A pair of source/drain regions are in upper portions of the semiconductor material on opposing lateral sides of the trench. A channel region in the semiconductor material below the pair of source/drain regions extends along sidewalls and around a bottom of the trench. The gate insulator comprises a low-k material and a high-k material. The low-k material is characterized by its dielectric constant k being no greater than 4.0. The high-k material is both (a) and (b), where: (a): characterized by its dielectric constant k being greater than 4.0; and (b): comprising SixMyO, where “M” is one or more of Al, metal(s) from Group 2, Group 3, Group 4, Group 5, and the lanthanide series of the periodic table; “x” is 0.999 to 0.6; and “y” is 0.001 to 0.4; the SixMyO being above the low-k material. Other embodiments, including method, are disclosed.
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2.
公开(公告)号:US20240038588A1
公开(公告)日:2024-02-01
申请号:US17815359
申请日:2022-07-27
Applicant: Micron Technology, Inc.
Inventor: Terrence B. McDaniel , Vinay Nair , Russell A. Benson , Christopher W. Petz , Si-Woo Lee , Silvia Borsari , Ping Chieh Chiang , Luca Fumagalli
IPC: H01L21/768 , H01L27/108
CPC classification number: H01L21/76897 , H01L27/10855 , H01L27/10885
Abstract: A method of forming a microelectronic device comprises forming interlayer dielectric material over a base structure comprising semiconductive structures separated from one another by insulative structures. Sacrificial line structures separated from one another by trenches are formed over the interlayer dielectric material. The sacrificial line structures horizontally overlap some of the semiconductive structures, and the trenches horizontally overlap some other of the semiconductive structures. Plug structures are formed within horizontal areas of the trenches and extend through the interlayer dielectric material and into the some other of the semiconductive structures. The sacrificial line structures are replaced with additional trenches. Conductive contact structures are formed within horizontal areas of the additional trenches and extend through the interlayer dielectric material and into the some of the semiconductive structures. Conductive line structures are formed within the additional trenches and in contact with the conductive contact structures.
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3.
公开(公告)号:US12022647B2
公开(公告)日:2024-06-25
申请号:US17323516
申请日:2021-05-18
Applicant: Micron Technology, Inc.
Inventor: Stephen D. Snyder , Thomas A. Figura , Siva Naga Sandeep Chalamalasetty , Ping Chieh Chiang , Scott L. Light , Yashvi Singh , Yan Li , Song Guo
CPC classification number: H10B12/482 , G11C5/06 , H01L27/0688 , H10B12/30 , H10B12/488
Abstract: A microelectronic device comprises memory cell structures extending from a base material. At least one memory cell structure of the memory cell structures comprises a central portion in contact with a digit line, extending from the base material and comprising opposing arcuate surfaces, an end portion in contact with a storage node contact on a side of the central portion, and an additional end portion in contact with an additional storage node contact on an opposite side of the central portion. Related microelectronic devices, electronic systems, and methods are also described.
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公开(公告)号:US20240179894A1
公开(公告)日:2024-05-30
申请号:US18499871
申请日:2023-11-01
Applicant: Micron Technology, Inc.
Inventor: Ping Chieh Chiang
CPC classification number: H10B12/488 , H01L29/401 , H01L29/49 , H10B12/02
Abstract: Methods, apparatuses, and systems related to a metal sense line contact are described. An example apparatus includes a sense line pillar comprising a barrier material over a semiconductor substrate. The sense line pillar further includes a liner material adjacent the barrier material. The sense line pillar further includes a first metal material over the barrier material. The sense line pillar further includes a second metal material over the first metal material. The sense line pillar further includes a cap material over the second metal material. The apparatus further cell contacts between a plurality of sense line pillars.
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5.
公开(公告)号:US20220375942A1
公开(公告)日:2022-11-24
申请号:US17323516
申请日:2021-05-18
Applicant: Micron Technology, Inc.
Inventor: Stephen D. Snyder , Thomas A. Figura , Siva Naga Sandeep Chalamalasetty , Ping Chieh Chiang , Scott L. Light , Yashvi Singh , Yan Li , Song Guo
IPC: H01L27/108 , H01L27/06 , G11C5/06
Abstract: A microelectronic device comprises memory cell structures extending from a base material. At least one memory cell structure of the memory cell structures comprises a central portion in contact with a digit line, extending from the base material and comprising opposing arcuate surfaces, an end portion in contact with a storage node contact on a side of the central portion, and an additional end portion in contact with an additional storage node contact on an opposite side of the central portion. Related microelectronic devices, electronic systems, and methods are also described.
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