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公开(公告)号：US11074989B2
公开(公告)日：2021-07-27
申请号：US16079737
申请日：2017-12-29
发明人： Jianmin Huang , Deping He , Xiangang Luo , Harish Reddy Singidi , Kulachet Tanpairoj , John Zhang , Ting Luo
摘要： Disclosed in some examples are NAND devices, firmware, systems, methods, and devices that apply smart algorithms to process ECC errors by taking advantage of excess overprovisioning. In some examples, when the amount of overprovisioned blocks are above a predetermined threshold, a first ECC block error handling mode may be implemented and when the overprovisioned blocks are equal or less than the predetermined threshold, a second mode of ECC block error handling may be utilized.
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公开(公告)号：US20210012851A1
公开(公告)日：2021-01-14
申请号：US16079737
申请日：2017-12-29
发明人： Jianmin Huang , Deping He , Xiangang Luo , Harish Reddy Singidi , Kulache Tanpairoj , John Zhang , Ting Luo
摘要： Disclosed in some examples are NAND devices, firmware, systems, methods, and devices that apply smart algorithms to process ECC errors by taking advantage of excess overprovisioning. In some examples, when the amount of overprovisioned blocks are above a predetermined threshold, a first ECC block error handling mode may be implemented and when the overprovisioned blocks are equal or less than the predetermined threshold, a second mode of ECC block error handling may be utilized.
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公开(公告)号：US10283205B2
公开(公告)日：2019-05-07
申请号：US15571232
申请日：2017-09-30
发明人： Ashutosh Malshe , Harish Singidi , Kishore Kumar Muchherla , Michael G. Miller , Sampath Ratnam , John Zhang , Jie Zhou
摘要： Devices and techniques for initiating and controlling preemptive idle time read scans in a flash based storage system are disclosed. In an example, a memory device includes a NAND memory array and a memory controller to schedule and initiate read scans among multiple locations of the memory array, with such read scans being preemptively triggered during an idle (background) state of the memory device, thus reducing host latency during read and write operations in an active (foreground) state of the memory device. In an example, the optimization technique includes scheduling a read scan operation, monitoring an active or idle state of host IO operations, and preemptively initiating the read scan operation when entering an idle state, before the read scan operation is scheduled to occur. In further examples, the read scan may preemptively occur based on time-based scheduling, frequency-based conditions, or event-driven conditions triggering the read scan.
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公开(公告)号：US11694760B2
公开(公告)日：2023-07-04
申请号：US17382926
申请日：2021-07-22
发明人： Jianmin Huang , Deping He , Xiangang Luo , Harish Reddy Singidi , Kulachet Tanpairoj , John Zhang , Ting Luo
CPC分类号： G11C29/42 , G11C29/14 , G11C29/20 , G11C29/44 , G11C29/886
摘要： Disclosed in some examples are NAND devices, firmware, systems, methods, and devices that apply smart algorithms to process ECC errors by taking advantage of excess overprovisioning. In some examples, when the amount of overprovisioned blocks are above a predetermined threshold, a first ECC block error handling mode may be implemented and when the overprovisioned blocks are equal or less than the predetermined threshold, a second mode of ECC block error handling may be utilized.
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公开(公告)号：US20190103164A1
公开(公告)日：2019-04-04
申请号：US15571232
申请日：2017-09-30
发明人： Ashutosh Malshe , Harish Singidi , Kishore Kumar Muchherla , Michael G. Miller , Sampath Ratnam , John Zhang , Jie Zhou
摘要： Devices and techniques for initiating and controlling preemptive idle time read scans in a flash based storage system are disclosed. In an example, a memory device includes a NAND memory array and a memory controller to schedule and initiate read scans among multiple locations of the memory array, with such read scans being preemptively triggered during an idle (background) state of the memory device, thus reducing host latency during read and write operations in an active (foreground) state of the memory device. In an example, the optimization technique includes scheduling a read scan operation, monitoring an active or idle state of host IO operations, and preemptively initiating the read scan operation when entering an idle state, before the read scan operation is scheduled to occur. In further examples, the read scan may preemptively occur based on time-based scheduling, frequency-based conditions, or event-driven conditions triggering the read scan.
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