公开(公告)号：US20240355685A1

公开(公告)日：2024-10-24

申请号：US18650718

申请日：2024-04-30

申请人： Micron Technology, Inc.

发明人： Amitava Majumdar ,  Radhakrishna Kotti ,  Mallesh Rajashekharaiah

IPC分类号： H01L21/66 ,  G11C13/00 ,  H01J37/04 ,  H01J37/28 ,  H01L21/768 ,  H01L23/528 ,  H10B63/00 ,  H10N70/00 ,  H10N70/20

CPC分类号： H01L22/12 ,  H01J37/28 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76877 ,  H01L23/5283 ,  H10B63/84 ,  G11C13/0004 ,  G11C13/0026 ,  G11C13/0028 ,  G11C13/004 ,  G11C13/0069 ,  G11C2213/71 ,  H01J37/04 ,  H01J2237/2804 ,  H01J2237/2814 ,  H10N70/231 ,  H10N70/826 ,  H10N70/8825

摘要： Methods, systems, and devices for electron beam probing techniques and related structures are described to enable inline testing of memory device structures. Conductive loops may be formed, some of which may be grounded and others of which may be electrically floating in accordance with a predetermined pattern. The loops may be scanned with an electron beam and image analysis techniques may be used to generate an optical pattern. The generated optical pattern may be compared to an expected optical pattern, which may be based on the predetermined pattern of grounded and floating loops. An electrical defect may be determined based on any difference between the generated optical pattern and the expected optical pattern. For example, if a second loop appears as having a brightness corresponding to a grounded loop, this may indicate that an unintended short exists. Fabrication techniques may be adjusted for subsequent devices to correct identified defects.

公开(公告)号：US20230397421A1

公开(公告)日：2023-12-07

申请号：US17876271

申请日：2022-07-28

申请人： Micron Technology, Inc.

发明人： Mallesh Rajashekharaiah ,  Lifang Xu ,  Nancy M. Lomeli

IPC分类号： H01L27/11582 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157

CPC分类号： H01L27/11582 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157

摘要： Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes tiers located one over another, the tiers including conductive materials that form part of respective control gates for memory cells of the apparatus; a staircase structure formed in the tiers, the conductive materials including respective portions that collectively form a part of the staircase structure, the staircase structure including a sidewall on a side of the staircase structure; a dielectric liner formed on the sidewall; recesses formed in respective tiers and adjacent the sidewall such that respective portions of the dielectric liner are located in the recesses; and a contact structure extending through a portion of the dielectric liner, wherein the portions of the dielectric liner are between the contract structure and the conductive materials.

公开(公告)号：US20220301946A1

公开(公告)日：2022-09-22

申请号：US17714770

申请日：2022-04-06

申请人： Micron Technology, Inc.

发明人： Amitava Majumdar ,  Radhakrishna Kotti ,  Mallesh Rajashekharaiah

IPC分类号： H01L21/66 ,  H01L21/768 ,  H01L27/24 ,  H01J37/28 ,  H01L23/528

摘要： Methods, systems, and devices for electron beam probing techniques and related structures are described to enable inline testing of memory device structures. Conductive loops may be formed, some of which may be grounded and others of which may be electrically floating in accordance with a predetermined pattern. The loops may be scanned with an electron beam and image analysis techniques may be used to generate an optical pattern. The generated optical pattern may be compared to an expected optical pattern, which may be based on the predetermined pattern of grounded and floating loops. An electrical defect may be determined based on any difference between the generated optical pattern and the expected optical pattern. For example, if a second loop appears as having a brightness corresponding to a grounded loop, this may indicate that an unintended short exists. Fabrication techniques may be adjusted for subsequent devices to correct identified defects.

公开(公告)号：US11996336B2

公开(公告)日：2024-05-28

申请号：US17714770

申请日：2022-04-06

申请人： Micron Technology, Inc.

发明人： Amitava Majumdar ,  Radhakrishna Kotti ,  Mallesh Rajashekharaiah

IPC分类号： H01L21/00 ,  H01J37/28 ,  H01L21/66 ,  H01L21/768 ,  H01L23/528 ,  H10B63/00 ,  G11C13/00 ,  H01J37/04 ,  H10N70/00 ,  H10N70/20

CPC分类号： H01L22/12 ,  H01J37/28 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76877 ,  H01L23/5283 ,  H10B63/84 ,  G11C13/0004 ,  G11C13/0026 ,  G11C13/0028 ,  G11C13/004 ,  G11C13/0069 ,  G11C2213/71 ,  H01J37/04 ,  H01J2237/2804 ,  H01J2237/2814 ,  H10N70/231 ,  H10N70/826 ,  H10N70/8825

摘要： Methods, systems, and devices for electron beam probing techniques and related structures are described to enable inline testing of memory device structures. Conductive loops may be formed, some of which may be grounded and others of which may be electrically floating in accordance with a predetermined pattern. The loops may be scanned with an electron beam and image analysis techniques may be used to generate an optical pattern. The generated optical pattern may be compared to an expected optical pattern, which may be based on the predetermined pattern of grounded and floating loops. An electrical defect may be determined based on any difference between the generated optical pattern and the expected optical pattern. For example, if a second loop appears as having a brightness corresponding to a grounded loop, this may indicate that an unintended short exists. Fabrication techniques may be adjusted for subsequent devices to correct identified defects.

公开(公告)号：US11302589B2

公开(公告)日：2022-04-12

申请号：US16700976

申请日：2019-12-02

申请人： Micron Technology, Inc.

发明人： Amitava Majumdar ,  Radhakrishna Kotti ,  Mallesh Rajashekharaiah

IPC分类号： H01L21/00 ,  H01L21/66 ,  H01L21/768 ,  H01L27/24 ,  H01J37/28 ,  H01L23/528 ,  H01J37/04 ,  G11C13/00 ,  H01L45/00

摘要： Methods, systems, and devices for electron beam probing techniques and related structures are described to enable inline testing of memory device structures. Conductive loops may be formed, some of which may be grounded and others of which may be electrically floating in accordance with a predetermined pattern. The loops may be scanned with an electron beam and image analysis techniques may be used to generate an optical pattern. The generated optical pattern may be compared to an expected optical pattern, which may be based on the predetermined pattern of grounded and floating loops. An electrical defect may be determined based on any difference between the generated optical pattern and the expected optical pattern. For example, if a second loop appears as having a brightness corresponding to a grounded loop, this may indicate that an unintended short exists. Fabrication techniques may be adjusted for subsequent devices to correct identified defects.

公开(公告)号：US20210166979A1

公开(公告)日：2021-06-03

申请号：US16700976

申请日：2019-12-02

申请人： Micron Technology, Inc.

发明人： Amitava Majumdar ,  Radhakrishna Kotti ,  Mallesh Rajashekharaiah

IPC分类号： H01L21/66 ,  H01L23/528 ,  H01L21/768 ,  H01L27/24 ,  H01J37/28

摘要： Methods, systems, and devices for electron beam probing techniques and related structures are described to enable inline testing of memory device structures. Conductive loops may be formed, some of which may be grounded and others of which may be electrically floating in accordance with a predetermined pattern. The loops may be scanned with an electron beam and image analysis techniques may be used to generate an optical pattern. The generated optical pattern may be compared to an expected optical pattern, which may be based on the predetermined pattern of grounded and floating loops. An electrical defect may be determined based on any difference between the generated optical pattern and the expected optical pattern. For example, if a second loop appears as having a brightness corresponding to a grounded loop, this may indicate that an unintended short exists. Fabrication techniques may be adjusted for subsequent devices to correct identified defects.