公开(公告)号：US20240404581A1

公开(公告)日：2024-12-05

申请号：US18667791

申请日：2024-05-17

Applicant: Micron Technology, Inc.

Inventor： Ameen D. Akel ,  Brent Keeth ,  James Brian Johnson ,  Chun-Yi Liu ,  Shivasankar Gunasekaran ,  Paul A. Laberge ,  Gregory A. King ,  Sai Krishna Mylavarapu ,  Su Wei Lim ,  Nathan A. Eckel ,  Lance P. Johnson ,  Nathan D. Henningson

IPC: G11C11/4093 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H10B80/00

Abstract: Methods, systems, and devices for interface techniques for stacked memory architectures are described. A semiconductor system, such as a memory system, may distribute memory access circuitry among multiple semiconductor dies of a stack. A first die of the system may include logic circuitry operable to configure a set of multiple first interface blocks of the first die. Each first interface block may include circuitry operable to communicate with one or more second interface blocks of one or more second dies of the system to access a respective set of one or more memory arrays of the one or more second dies. In some examples, the system may include a respective controller for each first interface block to support access operations via the first interface block. The system may also include non-volatile storage, one or more sensors, or a combination thereof to support various operations of the system.