公开(公告)号：US10985239B2

公开(公告)日：2021-04-20

申请号：US16543065

申请日：2019-08-16

Applicant: Micron Technology, Inc.

Inventor： Matthew N. Rocklein ,  An-Jen B. Cheng ,  Fredrick D. Fishburn ,  Sevim Korkmaz ,  Paul A. Paduano

IPC: H01L49/02 ,  H01L21/285 ,  H01L21/311 ,  H01L21/02

Abstract: Methods, apparatuses, and systems related to trim a semiconductor structure using oxygen are described. An example method includes forming a support structure for a semiconductor structure having a first silicate material on a working surface. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes forming an opening through the semiconductor structure. The method further includes depositing an electrode material within the opening. The method further includes removing portions of the support structure. The method further includes performing a controlled oxidative trim to an upper portion of the electrode material.

公开(公告)号：US20190267383A1

公开(公告)日：2019-08-29

申请号：US15903964

申请日：2018-02-23

Applicant: Micron Technology, Inc.

Inventor： Matthew N. Rocklein ,  Paul A. Paduano ,  Sanket S. Kelkar ,  Christopher W. Petz ,  Zhe Song ,  Vassil Antonov ,  Qian Tao

IPC: H01L27/108 ,  H01L49/02 ,  H01L21/285

Abstract: A DRAM capacitor comprising a first capacitor electrode configured as a container and comprising a doped titanium nitride material, a capacitor dielectric on the first capacitor electrode, and a second capacitor electrode on the capacitor dielectric. Methods of forming the DRAM capacitor are also disclosed, as are semiconductor devices and systems comprising such DRAM capacitors.

公开(公告)号：US20200381437A1

公开(公告)日：2020-12-03

申请号：US16423684

申请日：2019-05-28

Applicant: Micron Technology, Inc.

Inventor： Sevim Korkmaz ,  Devesh Dadhich Shreeram ,  Srinivasan Balakrishnan ,  Dewali Ray ,  Sanjeev Sapra ,  Paul A. Paduano

IPC: H01L27/108 ,  H01L49/02

Abstract: Methods, apparatuses, and systems related to removing a hard mask are described. An example method includes patterning a silicon hard mask on a semiconductor structure having a first silicate material on a working surface. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes an opening through the semiconductor structure using the patterned hard mask to form a pillar support. The method further includes forming a silicon liner material on the semiconductor structure. The method further includes removing the silicon liner material using a wet etch process.

公开(公告)号：US10811419B1

公开(公告)日：2020-10-20

申请号：US16419730

申请日：2019-05-22

Applicant: Micron Technology, Inc.

Inventor： Devesh Dadhich Shreeram ,  Sanket S. Kelkar ,  Gurpreet S. Lugani ,  Paul A. Paduano ,  Matthew N. Rocklein ,  Sanjeev Sapra ,  Christopher W. Petz

IPC: H01L27/108 ,  H01L49/02

Abstract: Methods, apparatuses, and systems related to shaping a storage node material are described. An example method includes forming a pillar with a pattern of materials. The method further includes depositing a storage node material on a side of the pillar. The method further includes etching sacrificial materials within the pillar. The method further includes etching the storage node material in a direction from the pillar into the storage node.

公开(公告)号：US10964536B2

公开(公告)日：2021-03-30

申请号：US16269201

申请日：2019-02-06

Applicant: Micron Technology, Inc.

Inventor： Francois H. Fabreguette ,  Paul A. Paduano ,  Gurtej S. Sandhu ,  John A. Smythe, III ,  Matthew N. Rocklein

IPC: H01L21/02 ,  H01L27/108

Abstract: Methods, apparatuses, and systems related to formation of an atomic layer of germanium (Ge) on a substrate material are described. An example method includes introducing, into a semiconductor processing chamber housing a substrate material having a high aspect ratio, a reducing agent, and introducing, into the semiconductor processing chamber, a germanium amidinate precursor. The example method further includes forming an atomic layer of germanium on the substrate material resulting from a reaction of the reducing agent and the germanium amidinate precursor.

公开(公告)号：US20200251334A1

公开(公告)日：2020-08-06

申请号：US16269201

申请日：2019-02-06

Applicant: Micron Technology, Inc.

Inventor： Francois H. Fabreguette ,  Paul A. Paduano ,  Gurtej S. Sandhu ,  John A. Smythe, III ,  Matthew N. Rocklein

IPC: H01L21/02

Abstract: Methods, apparatuses, and systems related to formation of an atomic layer of germanium (Ge) on a substrate material are described. An example method includes introducing, into a semiconductor processing chamber housing a substrate material having a high aspect ratio, a reducing agent, and introducing, into the semiconductor processing chamber, a germanium amidinate precursor. The example method further includes forming an atomic layer of germanium on the substrate material resulting from a reaction of the reducing agent and the germanium amidinate precursor.

公开(公告)号：US11289487B2

公开(公告)日：2022-03-29

申请号：US15903964

申请日：2018-02-23

Applicant: Micron Technology, Inc.

Inventor： Matthew N. Rocklein ,  Paul A. Paduano ,  Sanket S. Kelkar ,  Christopher W. Petz ,  Zhe Song ,  Vassil Antonov ,  Qian Tao

IPC: H01L27/108 ,  H01L21/285 ,  H01L49/02

Abstract: A DRAM capacitor comprising a first capacitor electrode configured as a container and comprising a doped titanium nitride material, a capacitor dielectric on the first capacitor electrode, and a second capacitor electrode on the capacitor dielectric. Methods of forming the DRAM capacitor are also disclosed, as are semiconductor devices and systems comprising such DRAM capacitors.

公开(公告)号：US20220208767A1

公开(公告)日：2022-06-30

申请号：US17655257

申请日：2022-03-17

Applicant: Micron Technology, Inc.

Inventor： Matthew N. Rocklein ,  Paul A. Paduano ,  Sanket S. Kelkar ,  Christopher W. Petz ,  Zhe Song ,  Vassil Antonov ,  Qian Tao

IPC: H01L27/108 ,  H01L21/285 ,  H01L49/02

Abstract: A DRAM capacitor comprising a first capacitor electrode configured as a container and comprising a doped titanium nitride material, a capacitor dielectric on the first capacitor electrode, and a second capacitor electrode on the capacitor dielectric. Methods of forming the DRAM capacitor are also disclosed, as are semiconductor devices and systems comprising such DRAM capacitors.

公开(公告)号：US11011521B2

公开(公告)日：2021-05-18

申请号：US16423684

申请日：2019-05-28

Applicant: Micron Technology, Inc.

Inventor： Sevim Korkmaz ,  Devesh Dadhich Shreeram ,  Srinivasan Balakrishnan ,  Dewali Ray ,  Sanjeev Sapra ,  Paul A. Paduano

IPC: H01L27/108 ,  H01L49/02

Abstract: Methods, apparatuses, and systems related to removing a hard mask are described. An example method includes patterning a silicon hard mask on a semiconductor structure having a first silicate material on a working surface. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes an opening through the semiconductor structure using the patterned hard mask to form a pillar support. The method further includes forming a silicon liner material on the semiconductor structure. The method further includes removing the silicon liner material using a wet etch process.

公开(公告)号：US20210050409A1

公开(公告)日：2021-02-18

申请号：US16543065

申请日：2019-08-16

Applicant: Micron Technology, Inc.

Inventor： Matthew N. Rocklein ,  An-Jen B. Cheng ,  Fredrick D. Fishburn ,  Sevim Korkmaz ,  Paul A. Paduano

IPC: H01L49/02 ,  H01L21/285 ,  H01L21/02 ,  H01L21/311

Abstract: Methods, apparatuses, and systems related to trim a semiconductor structure using oxygen are described. An example method includes forming a support structure for a semiconductor structure having a first silicate material on a working surface. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes forming an opening through the semiconductor structure. The method further includes depositing an electrode material within the opening. The method further includes removing portions of the support structure. The method further includes performing a controlled oxidative trim to an upper portion of the electrode material.