POWER LOSS ERROR DETECTION USING PARTIAL BLOCK HANDLING

    公开(公告)号:US20240170090A1

    公开(公告)日:2024-05-23

    申请号:US18492252

    申请日:2023-10-23

    CPC classification number: G11C29/52 G11C16/102 G11C16/26

    Abstract: In some implementations, a memory device may determine that a power loss has occurred. The memory device may determine a last written page (LWP) location associated with an LWP of a block of a memory of the memory device. The memory device may determine one of: a word line group (WLG) associated with the LWP location and at least one WLG-dependent offset associated with the WLG, or a partial block (PB) fill ratio associated with the LWP location and at least one PB-fill-ratio-dependent offset associated with the PB fill ratio. The memory device may perform a power loss error detection procedure based on one of the at least one WLG-dependent offset or the at least one PB-fill-ratio offset by applying the one of the at least one WLG-dependent offset or the at least one PB-fill-ratio offset to at least one read reference voltage.

    NAND DETECT EMPTY PAGE SCAN
    2.
    发明公开

    公开(公告)号:US20240071514A1

    公开(公告)日:2024-02-29

    申请号:US17898043

    申请日:2022-08-29

    CPC classification number: G11C16/16 G11C16/08 G11C16/3404 G11C16/3495

    Abstract: A controller of a memory device may identify a plurality of word line groups, included in a block of a memory of the memory device, that include erased pages of the block. The controller may identify a subset of word line groups, of the plurality of word line groups, for a NAND detect empty page (NDEP) scan operation. The controller may perform, based on identifying the subset of word line groups, the NDEP scan operation for the subset of word line groups. A voltage threshold for the NDEP scan may be based on an offset voltage that can be adaptive based on parameters such as quantity of program-erase cycles, memory cell type, and/or operating temperature, among other examples.

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