公开(公告)号：US20140195723A1

公开(公告)日：2014-07-10

申请号：US14148079

申请日：2014-01-06

申请人： MICRON TECHNOLOGY, INC.

发明人： Paolo Rolandi ,  Sandra Lospalluti ,  Raffaele Bufano ,  Stefano Andreoli ,  Tommaso Zerilli

IPC分类号： G06F12/02 ,  G11C16/10

CPC分类号： G06F12/0246 ,  G06F9/44573 ,  G06F2212/72 ,  G11C16/10 ,  G11C16/20

摘要： Example embodiments for configuring a serial non-volatile memory device may comprise a non-volatile configuration register to store a configuration value received from the processor, the configuration value to specify one or more attributes of a memory access operation. The configuration value may be read at least in part in response to power being applied to the memory device.

摘要翻译： 用于配置串行非易失性存储器设备的示例性实施例可以包括用于存储从处理器接收的配置值的非易失性配置寄存器，该配置值指定存储器访问操作的一个或多个属性。 至少部分地响应于施加到存储器件的功率来读取配置值。

公开(公告)号：US20200227119A1

公开(公告)日：2020-07-16

申请号：US16827799

申请日：2020-03-24

申请人： MICRON TECHNOLOGY, INC.

发明人： Violante Moschiano ,  Raffaele Bufano ,  Mirko Scapin ,  Andrea Giovanni-Xotta

IPC分类号： G11C16/10 ,  G11C16/24 ,  G11C16/04 ,  G11C11/408 ,  G11C8/12 ,  G11C16/34

摘要： A memory device includes a plurality of data lines, a common source, and control logic. The control logic is configured to implement a seed operation by biasing each of the plurality of data lines to a first voltage level with the common source biased to a second voltage level lower than the first voltage level. With each data line biased to the first voltage level, the control logic is configured to float each data line and bias the common source to the first voltage level such that the bias of each data line is boosted above the first voltage level due to capacitive coupling between each data line and the common source.

公开(公告)号：US08954660B2

公开(公告)日：2015-02-10

申请号：US14149624

申请日：2014-01-07

申请人： Micron Technology, Inc.

发明人： Paolo Rolandi ,  Sandra Lospalluti ,  Raffaele Bufano ,  Stefano Andreoli ,  Tommaso Zerilli

IPC分类号： G06F12/00 ,  G06F12/02 ,  G11C16/26

CPC分类号： G06F12/0246 ,  G06F9/30098 ,  G06F9/44573 ,  G06F2212/72 ,  G06F2212/7206 ,  G11C16/26 ,  G11C2216/30

摘要： Example embodiments for configuring a serial non-volatile memory device for an execute-in-place mode may comprise a non-volatile configuration register to store an execute-in-place mode value that may be read at least in part in response to power being applied to the memory device.

摘要翻译： 用于配置用于就地执行模式的串行非易失性存储器件的示例性实施例可以包括非易失性配置寄存器，用于存储至少部分地响应于功率而被读取的就地执行模式值 应用于存储器件。

公开(公告)号：US10790027B2

公开(公告)日：2020-09-29

申请号：US16827799

申请日：2020-03-24

申请人： MICRON TECHNOLOGY, INC.

发明人： Violante Moschiano ,  Raffaele Bufano ,  Mirko Scapin ,  Andrea Giovanni-Xotta

IPC分类号： G11C16/10 ,  G11C16/24 ,  G11C16/34 ,  G11C11/408 ,  G11C8/12 ,  G11C16/04

摘要： A memory device includes a plurality of data lines, a common source, and control logic. The control logic is configured to implement a seed operation by biasing each of the plurality of data lines to a first voltage level with the common source biased to a second voltage level lower than the first voltage level. With each data line biased to the first voltage level, the control logic is configured to float each data line and bias the common source to the first voltage level such that the bias of each data line is boosted above the first voltage level due to capacitive coupling between each data line and the common source.

公开(公告)号：US20150220431A1

公开(公告)日：2015-08-06

申请号：US14617736

申请日：2015-02-09

申请人： MICRON TECHNOLOGY, INC.

发明人： Paolo Rolandi ,  Sandra Lospalluti ,  Raffaele Bufano ,  Stefano Andreoli ,  Tommaso Zerilli

IPC分类号： G06F12/02 ,  G06F9/30

CPC分类号： G06F12/0246 ,  G06F9/30098 ,  G06F9/44573 ,  G06F2212/72 ,  G06F2212/7206 ,  G11C16/26 ,  G11C2216/30

摘要： Example embodiments for configuring a serial non-volatile memory device for an execute-in-place mode may comprise a non-volatile configuration register to store an execute-in-place mode value that may be read at least in part in response to power being applied to the memory device.

摘要翻译： 用于配置用于就地执行模式的串行非易失性存储器件的示例性实施例可以包括非易失性配置寄存器，用于存储至少部分地响应于功率而被读取的就地执行模式值 应用于存储器件。

公开(公告)号：US09262317B2

公开(公告)日：2016-02-16

申请号：US14148079

申请日：2014-01-06

申请人： MICRON TECHNOLOGY, INC.

发明人： Paolo Rolandi ,  Sandra Lospalluti ,  Raffaele Bufano ,  Stefano Andreoli ,  Tommaso Zerilli

IPC分类号： G06F12/00 ,  G06F12/02 ,  G06F9/445 ,  G11C16/10 ,  G11C16/20

CPC分类号： G06F12/0246 ,  G06F9/44573 ,  G06F2212/72 ,  G11C16/10 ,  G11C16/20

摘要： Example embodiments for configuring a serial non-volatile memory device may comprise a non-volatile configuration register to store a configuration value received from the processor, the configuration value to specify one or more attributes of a memory access operation. The configuration value may be read at least in part in response to power being applied to the memory device.

摘要翻译： 用于配置串行非易失性存储器设备的示例性实施例可以包括用于存储从处理器接收的配置值的非易失性配置寄存器，该配置值指定存储器访问操作的一个或多个属性。 至少部分地响应于施加到存储器件的功率来读取配置值。

公开(公告)号：US09251065B2

公开(公告)日：2016-02-02

申请号：US14617736

申请日：2015-02-09

申请人： MICRON TECHNOLOGY, INC.

发明人： Paolo Rolandi ,  Sandra Lospalluti ,  Raffaele Bufano ,  Stefano Andreoli ,  Tommaso Zerilli

IPC分类号： G06F12/00 ,  G06F12/02 ,  G11C16/26 ,  G06F9/30 ,  G06F9/445

CPC分类号： G06F12/0246 ,  G06F9/30098 ,  G06F9/44573 ,  G06F2212/72 ,  G06F2212/7206 ,  G11C16/26 ,  G11C2216/30

摘要： Example embodiments for configuring a serial non-volatile memory device for an execute-in-place mode may comprise a non-volatile configuration register to store an execute-in-place mode value that may be read at least in part in response to power being applied to the memory device.

公开(公告)号：US20140189220A1

公开(公告)日：2014-07-03

申请号：US14149624

申请日：2014-01-07

申请人： MICRON TECHNOLOGY, INC.

发明人： Paolo Rolandi ,  Sandra Lospalluti ,  Raffaele Bufano ,  Stefano Andreoli ,  Tommaso Zerilli

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F9/30098 ,  G06F9/44573 ,  G06F2212/72 ,  G06F2212/7206 ,  G11C16/26 ,  G11C2216/30

摘要： Example embodiments for configuring a serial non-volatile memory device for an execute-in-place mode may comprise a non-volatile configuration register to store an execute-in-place mode value that may be read at least in part in response to power being applied to the memory device.

摘要翻译： 用于配置用于就地执行模式的串行非易失性存储器件的示例性实施例可以包括非易失性配置寄存器，用于存储至少部分地响应于功率而被读取的就地执行模式值 应用于存储器件。