Caching lookup tables for block family error avoidance

    公开(公告)号:US12079065B2

    公开(公告)日:2024-09-03

    申请号:US17931937

    申请日:2022-09-14

    CPC classification number: G06F11/004 G06F12/0215 G06F12/12 G06F2212/251

    Abstract: In some implementations, a memory device may cache a subset of one or more block family error avoidance (BFEA) lookup tables associated with a block family associated with host data in a first memory location. The block family may be based on at least one of a time window during which the host data was written or a temperature window at which the host data was written. The memory device may receive a read command associated with host data and determine, based on the block family and the subset of the one or more BFEA tables, a threshold voltage offset associated with the host data. The memory device may compute a modified threshold voltage by applying the threshold voltage offset to a base read level voltage associated with the host data. The memory device may read, using the modified threshold voltage, the host data from the first memory location.

    Suspending memory erase operations to perform higher priority memory commands

    公开(公告)号:US12230332B2

    公开(公告)日:2025-02-18

    申请号:US17931935

    申请日:2022-09-14

    Abstract: Implementations described herein relate to suspending memory erase operations to perform high priority memory commands. In some implementations, a memory device may detect, while an active stage of an erase operation is being performed by the memory device, a pending memory command with a higher priority than the erase operation. The memory device may selectively suspend the active stage of the erase operation, to allow the pending memory command to be executed, based on the active stage of the erase operation that is being performed and/or a value of a suspend determination timer associated with suspending the active stage of the erase operation.

    Logical unit number queues and logical unit number queue scheduling for memory devices

    公开(公告)号:US11966635B2

    公开(公告)日:2024-04-23

    申请号:US17931934

    申请日:2022-09-14

    CPC classification number: G06F3/0659 G06F12/0253 G06F3/0604 G06F3/0679

    Abstract: A memory device may include logical units configured to store data, wherein the logical units are identified by corresponding logical unit numbers (LUNs) and are associated with corresponding LUN queue groups. Each LUN queue group may include LUN queues that are each associated with a respective intra-LUN priority level that indicates a priority of a LUN queue within a LUN queue group. The LUN queues are each associated with a respective execution priority level that indicates a priority for execution of commands in a LUN queue across LUN queue groups. A quantity of intra-LUN priority levels may be greater than a quantity of execution priority levels. A LUN scheduler may be configured to select and transfer commands from LUN queue groups to the execution queue group based on intra-LUN priority levels. A command executor may be configured to execute commands from the execution queue group based on execution priority levels.

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