公开(公告)号：US20220262919A1

公开(公告)日：2022-08-18

申请号：US17176444

申请日：2021-02-16

Applicant: Micron Technology, Inc.

Inventor： Manzar Siddik ,  Terry H. Kim ,  Kyubong Jung

IPC: H01L29/51 ,  H01L27/11582 ,  H01L21/28 ,  H01L29/423

Abstract: A method of forming an electronic device comprising forming an initial dielectric material comprising silicon-hydrogen bonds. A deuterium source gas and an oxygen source gas are reacted to produce deuterium species, and the initial dielectric material is exposed to the deuterium species. Deuterium of the deuterium species is incorporated into the initial dielectric material to form a deuterium-containing dielectric material. Additional methods are also disclosed, as are electronic devices and systems comprising the deuterium-containing dielectric material.

公开(公告)号：US20240297257A1

公开(公告)日：2024-09-05

申请号：US18658367

申请日：2024-05-08

Applicant: Micron Technology, Inc.

Inventor： Manzar Siddik ,  Terry H. Kim

IPC: H01L29/792 ,  G11C16/04 ,  H01L29/423 ,  H10B43/20 ,  H10B43/30

CPC classification number: H01L29/792 ,  G11C16/0466 ,  H01L29/4234 ,  H10B43/20 ,  H10B43/30

Abstract: Some embodiments include a memory cell having charge-trapping-material between a semiconductor channel material and a gating region. The charge-trapping-material includes silicon, nitrogen and trap-enhancing-additive. The trap-enhancing-additive includes one or more of carbon, phosphorus, boron and metal. Some embodiments include an integrated assembly having a stack of alternating first and second levels. The first levels include conductive structures and the second levels are insulative. Channel-material-pillars extend through the stack. Charge-trapping-regions are along the channel-material-pillars and are between the channel-material-pillars and the conductive structures. The charge-trapping-regions include a charge-trapping-material which contains silicon, nitrogen and trap-enhancing-additive. The trap-enhancing-additive includes one or more of carbon, phosphorus, boron and metal.

公开(公告)号：US12009436B2

公开(公告)日：2024-06-11

申请号：US18094377

申请日：2023-01-08

Applicant: Micron Technology, Inc.

Inventor： Manzar Siddik ,  Terry H. Kim

IPC: H01L21/00 ,  G11C16/04 ,  H01L29/423 ,  H01L29/792 ,  H10B43/20 ,  H10B43/30

CPC classification number: H01L29/792 ,  G11C16/0466 ,  H01L29/4234 ,  H10B43/20 ,  H10B43/30

Abstract: Some embodiments include a memory cell having charge-trapping-material between a semiconductor channel material and a gating region. The charge-trapping-material includes silicon, nitrogen and trap-enhancing-additive. The trap-enhancing-additive includes one or more of carbon, phosphorus, boron and metal. Some embodiments include an integrated assembly having a stack of alternating first and second levels. The first levels include conductive structures and the second levels are insulative. Channel-material-pillars extend through the stack. Charge-trapping-regions are along the channel-material-pillars and are between the channel-material-pillars and the conductive structures. The charge-trapping-regions include a charge-trapping-material which contains silicon, nitrogen and trap-enhancing-additive. The trap-enhancing-additive includes one or more of carbon, phosphorus, boron and metal.

公开(公告)号：US11751393B2

公开(公告)日：2023-09-05

申请号：US17524987

申请日：2021-11-12

Applicant: Micron Technology, Inc.

Inventor： Manzar Siddik ,  Chris M. Carlson ,  Terry H. Kim ,  Kunal Shrotri ,  Srinath Venkatesan

IPC: H01L27/11582 ,  H10B43/27 ,  H01L21/3215 ,  H01L21/3115 ,  H10B41/27

CPC classification number: H10B43/27 ,  H01L21/3115 ,  H01L21/3215 ,  H10B41/27

Abstract: A memory array comprising strings of memory cells comprises a vertical stack comprising alternating insulative tiers and conductive tiers. The strings of memory cells in the stack comprise channel-material strings and storage-material strings extending through the insulative tiers and the conductive tiers. At least some of the storage material of the storage-material strings in individual of the insulative tiers are intrinsically less charge-transmissive than is the storage material in the storage-material strings in individual of the conductive tiers. Other aspects, including method, are disclosed.

公开(公告)号：US11569390B2

公开(公告)日：2023-01-31

申请号：US16724753

申请日：2019-12-23

Applicant: Micron Technology, Inc.

Inventor： Manzar Siddik ,  Terry H. Kim

IPC: H01L21/00 ,  H01L29/792 ,  H01L27/11568 ,  G11C16/04 ,  H01L29/423 ,  H01L27/11578

Abstract: Some embodiments include a memory cell having charge-trapping-material between a semiconductor channel material and a gating region. The charge-trapping-material includes silicon, nitrogen and trap-enhancing-additive. The trap-enhancing-additive includes one or more of carbon, phosphorus, boron and metal. Some embodiments include an integrated assembly having a stack of alternating first and second levels. The first levels include conductive structures and the second levels are insulative. Channel-material-pillars extend through the stack. Charge-trapping-regions are along the channel-material-pillars and are between the channel-material-pillars and the conductive structures. The charge-trapping-regions include a charge-trapping-material which contains silicon, nitrogen and trap-enhancing-additive. The trap-enhancing-additive includes one or more of carbon, phosphorus, boron and metal.

公开(公告)号：US20220077186A1

公开(公告)日：2022-03-10

申请号：US17524987

申请日：2021-11-12

Applicant: Micron Technology, Inc.

Inventor： Manzar Siddik ,  Chris M. Carlson ,  Terry H. Kim ,  Kunal Shrotri ,  Srinath Venkatesan

IPC: H01L27/11582 ,  H01L21/3215 ,  H01L21/3115 ,  H01L27/11556

Abstract: A memory array comprising strings of memory cells comprises a vertical stack comprising alternating insulative tiers and conductive tiers. The strings of memory cells in the stack comprise channel-material strings and storage-material strings extending through the insulative tiers and the conductive tiers. At least some of the storage material of the storage-material strings in individual of the insulative tiers are intrinsically less charge-transmissive than is the storage material in the storage-material strings in individual of the conductive tiers. Other aspects, including method, are disclosed.

公开(公告)号：US20230163219A1

公开(公告)日：2023-05-25

申请号：US18094377

申请日：2023-01-08

Applicant: Micron Technology, Inc.

Inventor： Manzar Siddik ,  Terry H. Kim

IPC: H01L29/792 ,  G11C16/04 ,  H01L29/423 ,  H10B43/20 ,  H10B43/30

CPC classification number: H01L29/792 ,  G11C16/0466 ,  H01L29/4234 ,  H10B43/20 ,  H10B43/30

Abstract: Some embodiments include a memory cell having charge-trapping-material between a semiconductor channel material and a gating region. The charge-trapping-material includes silicon, nitrogen and trap-enhancing-additive. The trap-enhancing-additive includes one or more of carbon, phosphorus, boron and metal. Some embodiments include an integrated assembly having a stack of alternating first and second levels. The first levels include conductive structures and the second levels are insulative. Channel-material-pillars extend through the stack. Charge-trapping-regions are along the channel-material-pillars and are between the channel-material-pillars and the conductive structures. The charge-trapping-regions include a charge-trapping-material which contains silicon, nitrogen and trap-enhancing-additive. The trap-enhancing-additive includes one or more of carbon, phosphorus, boron and metal.

公开(公告)号：US11205660B2

公开(公告)日：2021-12-21

申请号：US16705388

申请日：2019-12-06

Applicant: Micron Technology, Inc.

Inventor： Manzar Siddik ,  Chris M. Carlson ,  Terry H. Kim ,  Kunal Shrotri ,  Srinath Venkatesan

IPC: H01L27/11582 ,  H01L21/3215 ,  H01L21/3115 ,  H01L27/11556

Abstract: A memory array comprising strings of memory cells comprises a vertical stack comprising alternating insulative tiers and conductive tiers. The strings of memory cells in the stack comprise channel-material strings and storage-material strings extending through the insulative tiers and the conductive tiers. At least some of the storage material of the storage-material strings in individual of the insulative tiers are intrinsically less charge-transmissive than is the storage material in the storage-material strings in individual of the conductive tiers. Other aspects, including method, are disclosed.

公开(公告)号：US20210193845A1

公开(公告)日：2021-06-24

申请号：US16724753

申请日：2019-12-23

Applicant: Micron Technology, Inc.

Inventor： Manzar Siddik ,  Terry H. Kim

IPC: H01L29/792 ,  H01L27/11568 ,  H01L27/11578 ,  H01L29/423 ,  G11C16/04

Abstract: Some embodiments include a memory cell having charge-trapping-material between a semiconductor channel material and a gating region. The charge-trapping-material includes silicon, nitrogen and trap-enhancing-additive. The trap-enhancing-additive includes one or more of carbon, phosphorus, boron and metal. Some embodiments include an integrated assembly having a stack of alternating first and second levels. The first levels include conductive structures and the second levels are insulative. Channel-material-pillars extend through the stack. Charge-trapping-regions are along the channel-material-pillars and are between the channel-material-pillars and the conductive structures. The charge-trapping-regions include a charge-trapping-material which contains silicon, nitrogen and trap-enhancing-additive. The trap-enhancing-additive includes one or more of carbon, phosphorus, boron and metal.

公开(公告)号：US20250159945A1

公开(公告)日：2025-05-15

申请号：US19020106

申请日：2025-01-14

Applicant: Micron Technology, Inc.

Inventor： Manzar Siddik ,  Terry H. Kim

IPC: H10D30/69 ,  G11C16/04 ,  H10B43/20 ,  H10B43/30

Abstract: Some embodiments include a memory cell having charge-trapping-material between a semiconductor channel material and a gating region. The charge-trapping-material includes silicon, nitrogen and trap-enhancing-additive. The trap-enhancing-additive includes one or more of carbon, phosphorus, boron and metal. Some embodiments include an integrated assembly having a stack of alternating first and second levels. The first levels include conductive structures and the second levels are insulative. Channel-material-pillars extend through the stack. Charge-trapping-regions are along the channel-material-pillars and are between the channel-material-pillars and the conductive structures. The charge-trapping-regions include a charge-trapping-material which contains silicon, nitrogen and trap-enhancing-additive. The trap-enhancing-additive includes one or more of carbon, phosphorus, boron and metal.