公开(公告)号：US10043587B2

公开(公告)日：2018-08-07

申请号：US15215423

申请日：2016-07-20

Applicant: Micron Technology, Inc.

Inventor： Kallol Mazumder ,  William O'Leary

IPC: G11C29/16 ,  H03K19/173 ,  G11C8/10 ,  G11C7/22 ,  G11C8/08 ,  G11C29/00 ,  G11C7/10 ,  G11C8/06 ,  G11C29/46

Abstract: Apparatuses and methods for nested mode registers to extend mode register functionality are disclosed. An example apparatus comprises a mode register configured to store address information and write data, a plurality of nested mode registers coupled to the mode register and configured to store the write data, and a decoder circuit coupled to the mode register and the plurality of nested mode registers and configured to selectively enable a nested mode register of the plurality of nested mode registers to store the write data based, at least in part, on the address information.

公开(公告)号：US20200073775A1

公开(公告)日：2020-03-05

申请号：US16678691

申请日：2019-11-08

Applicant: Micron Technology, Inc.

Inventor： Kallol Mazumder ,  William O'Leary

IPC: G06F11/267 ,  G11C7/10 ,  G11C29/00 ,  G11C29/16 ,  G11C8/08 ,  G11C7/22 ,  G11C8/10 ,  H03K19/173

Abstract: Apparatuses and methods for nested mode registers to extend mode register functionality are disclosed. An example apparatus comprises a mode register configured to store address information and write data, a plurality of nested mode registers coupled to the mode register and configured to store the write data, and a decoder circuit coupled to the mode register and the plurality of nested mode registers and configured to selectively enable a nested mode register of the plurality of nested mode registers to store the write data based, at least in part, on the address information.

公开(公告)号：US20180322937A1

公开(公告)日：2018-11-08

申请号：US16033076

申请日：2018-07-11

Applicant: Micron Technology, Inc.

Inventor： Kallol Mazumder ,  William O'Leary

IPC: G11C29/16 ,  H03K19/173 ,  G11C8/08 ,  G11C7/10 ,  G11C29/00 ,  G11C8/10 ,  G11C7/22 ,  G11C8/06 ,  G11C29/46

CPC classification number: G11C29/16 ,  G11C7/1045 ,  G11C7/109 ,  G11C7/22 ,  G11C8/06 ,  G11C8/08 ,  G11C8/10 ,  G11C29/00 ,  G11C29/46 ,  H03K19/1737

Abstract: Apparatuses and methods for nested mode registers to extend mode register functionality are disclosed. An example apparatus comprises a mode register configured to store address information and write data, a plurality of nested mode registers coupled to the mode register and configured to store the write data, and a decoder circuit coupled to the mode register and the plurality of nested mode registers and configured to selectively enable a nested mode register of the plurality of nested mode registers to store the write data based, at least in part, on the address information.

公开(公告)号：US20180025760A1

公开(公告)日：2018-01-25

申请号：US15215423

申请日：2016-07-20

Applicant: Micron Technology, Inc.

Inventor： Kallol Mazumder ,  William O'Leary

IPC: G11C8/04 ,  G11C7/10 ,  G11C7/22 ,  G11C8/06 ,  H03K19/173 ,  G11C8/10

CPC classification number: G11C29/16 ,  G11C7/1045 ,  G11C7/109 ,  G11C7/22 ,  G11C8/06 ,  G11C8/08 ,  G11C8/10 ,  G11C29/00 ,  G11C29/46 ,  H03K19/1737

Abstract: Apparatuses and methods for nested mode registers to extend mode register functionality are disclosed. An example apparatus comprises a mode register configured to store address information and write data, a plurality of nested mode registers coupled to the mode register and configured to store the write data, and a decoder circuit coupled to the mode register and the plurality of nested mode registers and configured to selectively enable a nested mode register of the plurality of nested mode registers to store the write data based, at least in part, on the address information.