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1.
公开(公告)号:US20200379645A1
公开(公告)日:2020-12-03
申请号:US16456054
申请日:2019-06-28
摘要: One or more energy storage device health parameters are monitored in a computing device. Backup of a volatile portion of a memory device such as a non-volatile dual in-line memory module (NVDIMM) is initiated based on the one or more monitored energy storage device parameters satisfying a predetermined operational condition. Example energy storage device health parameters include a State of Health (SOH) parameter and a State of Charge (SOC) parameter.
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2.
公开(公告)号:US20240264941A1
公开(公告)日:2024-08-08
申请号:US18635949
申请日:2024-04-15
发明人: Ravi MYSORE SHANTAMURTHY , Mallik BULUSU , Tom Long NGUYEN , Muhammad Ashfaq AHMED , Madhav Himanshubhai PANDYA
IPC分类号: G06F12/0804 , G06F11/16 , G06F11/20 , G06F13/40
CPC分类号: G06F12/0804 , G06F11/2053 , G06F13/4027 , G06F11/1612 , G06F2212/1032
摘要: A computing system that enables data stored in a persistent memory region to be preserved when a processor fails can include volatile memory comprising the persistent memory region, non-volatile memory, and a system on a chip (SoC). The SoC can include a main processor that is communicatively coupled to both the volatile memory and the non-volatile memory. The SoC can also include an auxiliary processor that is communicatively coupled to both the volatile memory and the non-volatile memory. The SoC can also include instructions that are executable by the auxiliary processor to cause the data in the persistent memory region of the volatile memory to be transferred to the non-volatile memory in response to a failure of the main processor.
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公开(公告)号:US20230055136A1
公开(公告)日:2023-02-23
申请号:US17406961
申请日:2021-08-19
发明人: Ravi MYSORE SHANTAMURTHY , Mallik BULUSU , Tom Long NGUYEN , Muhammad Ashfaq AHMED , Madhav Himanshubhai PANDYA
IPC分类号: G06F12/0804 , G06F13/40
摘要: A computing system that enables data stored in a persistent memory region to be preserved when a processor fails can include volatile memory comprising the persistent memory region, non-volatile memory, and a system on a chip (SoC). The SoC can include a main processor that is communicatively coupled to both the volatile memory and the non-volatile memory. The SoC can also include an auxiliary processor that is communicatively coupled to both the volatile memory and the non-volatile memory. The SoC can also include instructions that are executable by the auxiliary processor to cause the data in the persistent memory region of the volatile memory to be transferred to the non-volatile memory in response to a failure of the main processor.
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公开(公告)号:US20220318093A1
公开(公告)日:2022-10-06
申请号:US17221751
申请日:2021-04-02
发明人: Mallik BULUSU , Muhammad Ashfaq AHMED , Tom Long NGUYEN , Neeraj LADKANI , Ravi MYSORE SHANTAMURTHY
摘要: To preserve error context during a reboot of a computing device, firmware within the computing device can be configured to implement a method that includes determining where the error context is stored in volatile memory. The method can also include identifying a plurality of recorder regions in non-volatile memory that have been assigned to store the error context. The plurality of recorder regions can be disaggregated across a plurality of distinct non-volatile memory regions. The method can also include flushing the error context from a plurality of different volatile memory locations to the plurality of recorder regions in response to detecting a trigger. The flushing can occur prior to the reboot of the computing device. The method can also include restoring at least some of the error context to the volatile memory after the computing device has been rebooted.
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公开(公告)号:US20180165101A1
公开(公告)日:2018-06-14
申请号:US15378406
申请日:2016-12-14
发明人: Mallik BULUSU , Bryan KELLY , Tom Long NGUYEN
IPC分类号: G06F9/44
摘要: Technologies are described which permit kernel updates or firmware fixes, and include re-initialization of kernel data structures, without losing user context information that has been created by services, virtual machines, or user applications. Tailored code in a server or other computing system sets a kernel soft reset (KSR) indicator and saves the user context to non-volatile storage. When a KSR is underway, boot code skips the power on self-test and similar initializations (thereby reducing downtime), loads a kernel image, initializes kernel data structures, restores the user context, and passes control to the initialized kernel to continue computing system operation with the same user context. Device drivers may also be re-initialized. The loaded kernel may use newly fixed firmware, or may have a security patch installed, for instance. The non-volatile storage may operate at RAM speed, e.g., it may include NVDIMM memory. The kernel may be validated before receiving control.
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公开(公告)号:US20240211257A1
公开(公告)日:2024-06-27
申请号:US18089385
申请日:2022-12-27
发明人: Mallik BULUSU , Tom Long NGUYEN , Daini XIE , Karunakara KOTARY , Muhammad Ashfaq AHMED , Subhankar PANDA , Ravi Mysore Shantamurthy
CPC分类号: G06F9/30047 , G06F8/65 , G06F9/52 , G06F11/0793
摘要: A computer implemented method includes creating a cache within system management memory to cache data from a firmware flash memory to allow access to the cache by system firmware, providing a baseboard management controller ownership of the firmware flash memory in a server, updating the firmware in the firmware flash memory via the baseboard management controller, relinquishing baseboard management controller ownership of firmware flash memory upon completion of updating the firmware, and flushing the cache back to the firmware flash memory in response to baseboard management controller relinquishing ownership of the firmware flash memory.
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公开(公告)号:US20210311833A1
公开(公告)日:2021-10-07
申请号:US16837885
申请日:2020-04-01
摘要: A method for targeted repair of a hardware component in a computing device that is part of a cloud computing system includes monitoring a plurality of hardware components in the computing device. At some point, a defective sub-component within the hardware component of the computing device is identified. In addition to the defective sub-component, the hardware component also includes at least one sub-component that is functioning properly and a spare component that can be used in place of the defective sub-component. The method also includes initiating a targeted repair action while the computing device is connected to the cloud computing system. The targeted repair action prevents the defective sub-component from being used by the computing device without preventing sub-components that are functioning properly from being used by the computing device. The targeted repair action causes the spare component to be used in place of the defective sub-component.
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公开(公告)号:US20200151048A1
公开(公告)日:2020-05-14
申请号:US16184003
申请日:2018-11-08
摘要: An error-handling system provides detection of an error on an I/O hardware endpoint, triggering of an operating system interrupt in response to detected error, reception of the interrupt at an operating system component, determination, in response to the received interrupt, whether to handle the error using an operating system handler or a firmware error handler associated with the I/O hardware endpoint, and, if it is determined to handle the error using a firmware runtime error handler associated with the I/O hardware endpoint, triggering of a firmware interrupt associated with the firmware runtime error handler.
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