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    DATA PROCESSING UNIT FOR STREAM PROCESSING
    1.
    发明公开
    DATA PROCESSING UNIT FOR STREAM PROCESSING 审中-公开

    公开(公告)号：US20240061713A1

    公开(公告)日：2024-02-22

    申请号：US18500070

    申请日：2023-11-01

    Applicant: Microsoft Technology Licensing, LLC

    Inventor： Pradeep Sindhu ,  Jean-Marc Frailong ,  Wael Noureddine ,  Felix A. Marti ,  Deepak Goel ,  Rajan Goyal ,  Bertrand Serlet

    IPC: G06F9/50 ,  G06F15/173

    CPC classification number: G06F9/5027 ,  G06F15/17337

    Abstract: A new processing architecture is described that utilizes a data processing unit (DPU). Unlike conventional compute models that are centered around a central processing unit (CPU), the DPU that is designed for a data-centric computing model in which the data processing tasks are centered around the DPU. The DPU may be viewed as a highly programmable, high-performance I/O and data-processing hub designed to aggregate and process network and storage I/O to and from other devices. The DPU comprises a network interface to connect to a network, one or more host interfaces to connect to one or more application processors or storage devices, and a multi-core processor with two or more processing cores executing a run-to-completion data plane operating system and one or more processing cores executing a multi-tasking control plane operating system. The data plane operating system is configured to support software functions for performing the data processing tasks.

    Memory management in a multiple processor system
    5.
    发明授权
    Memory management in a multiple processor system 有权

    公开(公告)号：US11809321B2

    公开(公告)日：2023-11-07

    申请号：US17806419

    申请日：2022-06-10

    Applicant: Microsoft Technology Licensing, LLC

    Inventor： Wael Noureddine ,  Jean-Marc Frailong ,  Pradeep Sindhu ,  Bertrand Serlet

    IPC: G06F12/0815 ,  G06F12/0804 ,  G06F15/173

    CPC classification number: G06F12/0815 ,  G06F12/0804 ,  G06F15/17325 ,  G06F2212/1016 ,  G06F2212/1032

    Abstract: Methods and apparatus for memory management are described. In one example, this disclosure describes a method that includes executing, by a first processing unit, first work unit operations specified by a first work unit message, wherein execution of the first work unit operations includes accessing data from shared memory included within the computing system, modifying the data, and storing the modified data in a first cache associated with the first processing unit; identifying, by the computing system, a second work unit message that specifies second work unit operations that access the shared memory; updating, by the computing system, the shared memory by storing the modified data in the shared memory; receiving, by the computing system, an indication that updating the shared memory with the modified data is complete; and enabling the second processing unit to execute the second work unit operations.

    Data processing unit for stream processing
    9.
    发明授权
    Data processing unit for stream processing 有权

    公开(公告)号：US11842216B2

    公开(公告)日：2023-12-12

    申请号：US16939617

    申请日：2020-07-27

    Applicant: Microsoft Technology Licensing, LLC

    Inventor： Pradeep Sindhu ,  Jean-Marc Frailong ,  Wael Noureddine ,  Felix A. Marti ,  Deepak Goel ,  Rajan Goyal ,  Bertrand Serlet

    IPC: G06F9/50 ,  G06F15/173

    CPC classification number: G06F9/5027 ,  G06F15/17337

    Abstract: A new processing architecture is described that utilizes a data processing unit (DPU). Unlike conventional compute models that are centered around a central processing unit (CPU), the DPU that is designed for a data-centric computing model in which the data processing tasks are centered around the DPU. The DPU may be viewed as a highly programmable, high-performance I/O and data-processing hub designed to aggregate and process network and storage I/O to and from other devices. The DPU comprises a network interface to connect to a network, one or more host interfaces to connect to one or more application processors or storage devices, and a multi-core processor with two or more processing cores executing a run-to-completion data plane operating system and one or more processing cores executing a multi-tasking control plane operating system. The data plane operating system is configured to support software functions for performing the data processing tasks.

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