Poly diode structure for photo diode
    1.
    发明授权
    Poly diode structure for photo diode 有权
    光二极管的聚二极管结构

    公开(公告)号:US07993956B2

    公开(公告)日:2011-08-09

    申请号:US11618685

    申请日:2006-12-29

    IPC分类号: H01L21/00

    摘要: An integrated circuit device for converting an incident optical signal into an electrical signal comprises a semiconductor substrate, a well region formed inside the semiconductor substrate, a dielectric layer formed over the well region, and a layer of polysilicon for receiving the incident optical signal, formed over the dielectric layer, including a p-type portion, an n-type portion and an undoped portion disposed between the p-type and n-type portions, wherein the well region is biased to control the layer of polysilicon for providing the electrical signal.

    摘要翻译: 用于将入射光信号转换成电信号的集成电路装置包括半导体衬底,形成在半导体衬底内部的阱区,形成在阱区上的电介质层和用于接收入射光信号的多晶硅层,形成 包括p型部分,n型部分和设置在p型和n型部分之间的未掺杂部分,其中阱区被偏置以控制多晶硅层以提供电信号 。

    SCR devices in silicon-on-insulator CMOS process for on-chip ESD protection
    2.
    发明授权
    SCR devices in silicon-on-insulator CMOS process for on-chip ESD protection 有权
    用于片上ESD保护的硅绝缘体CMOS工艺中的SCR器件

    公开(公告)号:US06750515B2

    公开(公告)日:2004-06-15

    申请号:US10062714

    申请日:2002-02-05

    IPC分类号: H01L2776

    CPC分类号: H01L27/0262 H01L27/1203

    摘要: A silicon-on-isolator CMOS integrated circuit device includes a semiconductor substrate, an isolation layer formed over the semiconductor substrate, an n-type MOS transistor having a gate, a drain region, and a source region formed over the isolation layer, and a p-type MOS transistor having a gate, a drain region, and a source region formed over the isolation layer and contiguous with the n-type MOS transistor, wherein the n-type MOS transistor and the p-type MOS transistor form a silicon controlled rectifier to provide electrostatic discharge protection.

    摘要翻译: 硅隔离器CMOS集成电路器件包括半导体衬底,形成在半导体衬底上的隔离层,具有形成在隔离层上的栅极,漏极区域和源极区域的n型MOS晶体管,以及 p型MOS晶体管,其具有形成在隔离层上并与n型MOS晶体管邻接的栅极,漏极区域和源极区域,其中n型MOS晶体管和p型MOS晶体管形成硅控制 整流器提供静电放电保护。

    Polydiode structure for photo diode
    3.
    发明授权
    Polydiode structure for photo diode 有权
    光电二极管的多晶硅结构

    公开(公告)号:US08367457B2

    公开(公告)日:2013-02-05

    申请号:US13205017

    申请日:2011-08-08

    IPC分类号: H01L21/00

    摘要: An integrated circuit device for converting an incident optical signal into an electrical signal comprises a semiconductor substrate, a well region formed inside the semiconductor substrate, a dielectric layer formed over the well region, and a layer of polysilicon for receiving the incident optical signal, formed over the dielectric layer, including a p-type portion, an n-type portion and an undoped portion disposed between the p-type and n-type portions, wherein the well region is biased to control the layer of polysilicon for providing the electrical signal.

    摘要翻译: 用于将入射光信号转换成电信号的集成电路装置包括半导体衬底,形成在半导体衬底内部的阱区,形成在阱区上的电介质层和用于接收入射光信号的多晶硅层,形成 包括p型部分,n型部分和设置在p型和n型部分之间的未掺杂部分,其中阱区被偏置以控制多晶硅层以提供电信号 。

    Poly diode structure for photo diode
    4.
    发明授权
    Poly diode structure for photo diode 有权
    光二极管的聚二极管结构

    公开(公告)号:US07439597B2

    公开(公告)日:2008-10-21

    申请号:US11618247

    申请日:2006-12-29

    IPC分类号: H01L27/14

    摘要: An integrated circuit device for converting an incident optical signal into an electrical signal comprises a semiconductor substrate, a well region formed inside the semiconductor substrate, a dielectric layer formed over the well region, and a layer of polysilicon for receiving the incident optical signal, formed over the dielectric layer, including a p-type portion, an n-type portion and an undoped portion disposed between the p-type and n-type portions, wherein the well region is biased to control the layer of polysilicon for providing the electrical signal.

    摘要翻译: 用于将入射光信号转换成电信号的集成电路装置包括半导体衬底,形成在半导体衬底内部的阱区,形成在阱区上的电介质层和用于接收入射光信号的多晶硅层,形成 包括p型部分,n型部分和设置在p型和n型部分之间的未掺杂部分,其中阱区被偏置以控制多晶硅层以提供电信号 。

    Polydiode structure for photo diode
    5.
    发明授权
    Polydiode structure for photo diode 有权
    光电二极管的多晶硅结构

    公开(公告)号:US07205641B2

    公开(公告)日:2007-04-17

    申请号:US11017053

    申请日:2004-12-21

    IPC分类号: H01L31/075

    摘要: An integrated circuit device for converting an incident optical signal into an electrical signal comprises a semiconductor substrate, a well region formed inside the semiconductor substrate, a dielectric layer formed over the well region, and a layer of polysilicon for receiving the incident optical signal, formed over the dielectric layer, including a p-type portion, an n-type portion and an undoped portion disposed between the p-type and n-type portions, wherein the well region is biased to control the layer of polysilicon for providing the electrical signal.

    摘要翻译: 用于将入射光信号转换成电信号的集成电路装置包括半导体衬底,形成在半导体衬底内部的阱区,形成在阱区上的电介质层和用于接收入射光信号的多晶硅层,形成 包括p型部分,n型部分和设置在p型和n型部分之间的未掺杂部分,其中阱区被偏置以控制多晶硅层以提供电信号 。

    Charged device model electrostatic discharge protection for integrated circuits
    7.
    发明授权
    Charged device model electrostatic discharge protection for integrated circuits 有权
    集成电路充电装置型静电放电保护

    公开(公告)号:US06437407B1

    公开(公告)日:2002-08-20

    申请号:US09706807

    申请日:2000-11-07

    IPC分类号: H01L2362

    CPC分类号: H01L27/0251

    摘要: A charged-device model (CDM) electrostatic discharge (ESD) protection for complementary metal oxide semiconductor (CMOS) integrated circuits such as input/output (I/O) circuits. A CDM ESD clamp device is disposed on an output buffer or an input stage of the CMOS circuit in order to clamp the CDM ESD overstress voltage across the gate oxide during a CDM ESD event. When applied to I/O circuits, a bi-directional diode string with multiple diodes is used in conjunction with the CDM ESD clamp device. During the CDM ESD event, CDM charges (CDM Q) originally stored in the common substrate are discharged through the desired CDM ESD clamp device so as to protect all functional devices in the input, output or I/O circuits, and effectively improve the CDM ESD level in integrated circuit (IC) products.

    摘要翻译: 用于互补金属氧化物半导体(CMOS)集成电路(例如输入/输出(I / O))电路的充电器件型号(CDM)静电放电(ESD)保护。 CDM ESD钳位器件设置在CMOS电路的输出缓冲器或输入级上,以便在CDM ESD事件期间钳位栅极氧化物上的CDM ESD过应力电压。 当应用于I / O电路时,具有多个二极管的双向二极管串与CDM ESD钳位装置结合使用。 在CDM ESD事件期间,原始存储在公共基板中的CDM充电(CDM Q)通过所需的CDM ESD钳位装置放电,以保护输入,输出或I / O电路中的所有功能器件,并有效改善CDM 集成电路(IC)产品中的ESD电平。

    POLYDIODE STRUCTURE FOR PHOTO DIODE
    8.
    发明申请
    POLYDIODE STRUCTURE FOR PHOTO DIODE 有权
    光电二极管的聚合物结构

    公开(公告)号:US20110294253A1

    公开(公告)日:2011-12-01

    申请号:US13205017

    申请日:2011-08-08

    IPC分类号: H01L31/18

    摘要: An integrated circuit device for converting an incident optical signal into an electrical signal comprises a semiconductor substrate, a well region formed inside the semiconductor substrate, a dielectric layer formed over the well region, and a layer of polysilicon for receiving the incident optical signal, formed over the dielectric layer, including a p-type portion, an n-type portion and an undoped portion disposed between the p-type and n-type portions, wherein the well region is biased to control the layer of polysilicon for providing the electrical signal.

    摘要翻译: 用于将入射光信号转换成电信号的集成电路装置包括半导体衬底,形成在半导体衬底内部的阱区,形成在阱区上的电介质层和用于接收入射光信号的多晶硅层,形成 包括p型部分,n型部分和设置在p型和n型部分之间的未掺杂部分,其中阱区被偏置以控制多晶硅层以提供电信号 。

    Automatic transmission line pulse system
    10.
    发明授权
    Automatic transmission line pulse system 有权
    自动传输线脉冲系统

    公开(公告)号:US07138804B2

    公开(公告)日:2006-11-21

    申请号:US10810645

    申请日:2004-03-29

    IPC分类号: G01N27/60 G01R31/26

    CPC分类号: G01R31/002

    摘要: A system for measuring electrostatic discharge (ESD) characteristics of a semiconductor device that comprises at least one pulse generator generating ESD-scale pulses, a first point of the semiconductor device receiving a first ESD-scale pulse from the at least one pulse generator, a second point of the semiconductor device receiving the first ESD-scale pulse from the at least one pulse generator, at least a third point of the semiconductor device receiving a second ESD-scale pulse from the at least one pulse generator, and a data collector to collect data on the ESD characteristics of the semiconductor device.

    摘要翻译: 一种用于测量半导体器件的静电放电(ESD)特性的系统,包括至少一个产生ESD标度脉冲的脉冲发生器,所述半导体器件的第一点从所述至少一个脉冲发生器接收第一ESD标度脉冲, 所述半导体器件的第二点从所述至少一个脉冲发生器接收所述第一ESD标尺脉冲,所述半导体器件的至少第三点从所述至少一个脉冲发生器接收第二ESD标度脉冲,以及数据收集器 收集关于半导体器件的ESD特性的数据。