公开(公告)号：US07688107B2

公开(公告)日：2010-03-30

申请号：US11387782

申请日：2006-03-24

申请人： Mitsuaki Osame ,  Aya Anzai ,  Mizuki Sato

发明人： Mitsuaki Osame ,  Aya Anzai ,  Mizuki Sato

IPC分类号： H03H11/16

CPC分类号： G11C19/00 ,  G09G3/3674 ,  G09G3/3685 ,  G11C19/28

摘要： The present invention provides a shift register which can operate favorably without providing a level shift portion. The first clocked inverter at the (2n−1)-th stage operates in accordance with the first output from the previous stage, an output from the second clocked inverter at the previous stage, and the first CK signal; the second clocked inverter at the (2n−1)-th stage operates in accordance with the second output from the previous stage, an output of the first clocked inverter at the (2n−1)-th stage, and the first CK signal; one of the first output and the second output is equal to a potential of VDD and the other is equal to a potential of VSS; the first CK signal at the 2n-th stage operates the third output from the (2n−1)-th stage, an output of the second clocked inverter and the second CK signal; the second clocked inverter at the 2n-th stage operates in accordance with the fourth output from the (2n−1)-th stage, an output from the first clocked inverter at the 2n-th stage, and the second CK signal; one of the third output and the fourth output is equal to the potential of VDD and the other is equal to the potential of VSS, and the second CK signal is an inversion signal of the first CK signal and the amplitude of the CK signal is smaller than the power supply potential.

摘要翻译： 本发明提供一种移位寄存器，其能够有效地操作而不设置电平移位部分。 第（2n-1）级的第一时钟反相器根据前一级的第一输出，前一级的第二时钟反相器的输出和第一CK信号进行工作; （2n-1）级的第二时钟反相器根据前一级的第二输出，第（2n-1）级的第一时钟反相器的输出和第一CK信号进行工作; 第一输出和第二输出之一等于VDD的电位，另一个等于VSS的电位; 第2n级的第一CK信号从第（2n-1）级的第三输出操作第二时钟反相器和第二CK信号的输出; 第2n级的第二时钟反相器根据第（2n-1）级的第四输出，第2n阶段的第一时钟反相器的输出和第二CK信号进行工作; 第三输出和第四输出之一等于VDD的电位，另一个等于VSS的电位，第二个CK信号是第一个CK信号的反相信号，CK信号的幅度较小 比供电潜力大。

公开(公告)号：US20060233293A1

公开(公告)日：2006-10-19

申请号：US11387782

申请日：2006-03-24

申请人： Mitsuaki Osame ,  Aya Anzai ,  Mizuki Sato

发明人： Mitsuaki Osame ,  Aya Anzai ,  Mizuki Sato

IPC分类号： G11C19/00

CPC分类号： G11C19/00 ,  G09G3/3674 ,  G09G3/3685 ,  G11C19/28

摘要： The present invention provides a shift register which can operate favorably without providing a level shift portion. The first clocked inverter at the (2n−1)-th stage operates in accordance with the first output from the previous stage, an output from the second clocked inverter at the previous stage, and the first CK signal; the second clocked inverter at the (2n−1)-th stage operates in accordance with the second output from the previous stage, an output of the first clocked inverter at the (2n−1)-th stage, and the first CK signal; one of the first output and the second output is equal to a potential of VDD and the other is equal to a potential of VSS; the first CK signal at the 2n-th stage operates the third output from the (2n−1)-th stage, an output of the second clocked inverter and the second CK signal; the second clocked inverter at the 2n-th stage operates in accordance with the fourth output from the (2n−1)-th stage, an output from the first clocked inverter at the 2n-th stage, and the second CK signal; one of the third output and the fourth output is equal to the potential of VDD and the other is equal to the potential of VSS, and the second CK signal is an inversion signal of the first CK signal and the amplitude of the CK signal is smaller than the power supply potential.

摘要翻译： 本发明提供一种移位寄存器，其能够有效地操作而不设置电平移位部分。 第（2n-1）级的第一时钟反相器根据前一级的第一输出，前一级的第二时钟反相器的输出和第一CK信号进行工作; （2n-1）级的第二时钟反相器根据前一级的第二输出，第（2n-1）级的第一时钟反相器的输出和第一CK信号进行工作; 第一输出和第二输出之一等于VDD的电位，另一个等于VSS的电位; 第2n级的第一CK信号从第（2n-1）级的第三输出操作第二时钟反相器和第二CK信号的输出; 第2n级的第二时钟反相器根据第（2n-1）级的第四输出，第2n阶段的第一时钟反相器的输出和第二CK信号进行工作; 第三输出和第四输出之一等于VDD的电位，另一个等于VSS的电位，第二个CK信号是第一个CK信号的反相信号，CK信号的幅度较小 比供电潜力大。

公开(公告)号：US08664976B2

公开(公告)日：2014-03-04

申请号：US13248420

申请日：2011-09-29

申请人： Mitsuaki Osame ,  Aya Anzai

发明人： Mitsuaki Osame ,  Aya Anzai

IPC分类号： G09G3/36 ,  G11C19/00 ,  G06F7/38

CPC分类号： G09G3/3677 ,  G09G3/3266 ,  G09G3/3275 ,  G09G3/3688 ,  G11C19/00 ,  G11C19/28

摘要： The invention provides a shift register which can operate normally while suppressing a delay of signal and a rounding of waveform. The shift register of the invention includes a plurality of stages of flip-flop circuits each of which includes a clocked inverter. The clocked inverter includes a first transistor and a second transistor which are connected in series, a first compensation circuit including a third transistor and a fourth transistor which are connected in series, and a second compensation circuit including a fifth transistor and a transmission gate. According to the first compensation circuit, a timing at which a signal outputted from the flip-flop circuit rises or falls can be controlled in synchronization with an output of two stages before. The second compensation circuit can control a clock signal input can be controlled.

摘要翻译： 本发明提供了一种能够在抑制信号延迟和波形舍入的同时正常工作的移位寄存器。 本发明的移位寄存器包括多个级的触发器电路，每个触发器电路包括时钟反相器。 时钟反相器包括串联连接的第一晶体管和第二晶体管，包括串联连接的第三晶体管和第四晶体管的第一补偿电路和包括第五晶体管和透射栅的第二补偿电路。 根据第一补偿电路，可以与前两级的输出同步地控制从触发器电路输出的信号上升或下降的定时。 第二补偿电路可以控制时钟信号输入可以控制。

公开(公告)号：US08624258B2

公开(公告)日：2014-01-07

申请号：US13223582

申请日：2011-09-01

申请人： Shunpei Yamazaki ,  Masahiko Hayakawa ,  Yoshifumi Tanada ,  Mitsuaki Osame ,  Aya Anzai ,  Ryota Fukumoto

发明人： Shunpei Yamazaki ,  Masahiko Hayakawa ,  Yoshifumi Tanada ,  Mitsuaki Osame ,  Aya Anzai ,  Ryota Fukumoto

IPC分类号： H01L27/14 ,  G09G3/30

CPC分类号： H01L27/3262 ,  G09G3/3233 ,  G09G2310/0251 ,  G09G2330/04 ,  H01L27/0248 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/1255 ,  H01L27/3248 ,  H01L27/3265 ,  H01L27/3276 ,  H01L29/78675

摘要： Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.

摘要翻译： 半导体元件由于静电放电损坏而劣化或被破坏。 本发明提供一种其中在每个像素中形成保护装置的半导体器件。 保护装置设置有从由电阻元件，电容器元件和整流元件组成的组中选择的一个或多个元件。 通过在发光元件的像素电极和源电极之间设置保护装置，可以减轻由于在像素电极中积聚的电荷导致的晶体管的源电极或漏电极的电位的突然变化，或 晶体管的漏极。 因此防止了由于静电放电损坏导致的半导体元件的劣化或破坏。

公开(公告)号：US08400067B2

公开(公告)日：2013-03-19

申请号：US13480550

申请日：2012-05-25

申请人： Mitsuaki Osame ,  Aya Anzai ,  Yu Yamazaki

发明人： Mitsuaki Osame ,  Aya Anzai ,  Yu Yamazaki

IPC分类号： G09G3/10

CPC分类号： H01L27/326 ,  G09G3/2022 ,  G09G3/3233 ,  G09G2300/0417 ,  G09G2300/0842 ,  G09G2300/0885 ,  G09G2310/0251 ,  H01L27/283 ,  H01L29/78672 ,  H01L51/5012 ,  H01L51/5296

摘要： A light emitting device and an element substrate which are capable of suppressing variations in the luminance intensity of a light emitting element among pixels due to characteristic variations of a driving transistor without suppressing off-current of a switching transistor low and increasing storage capacity of a capacitor. According to the invention, a depletion mode transistor is used as a driving transistor. The gate of the driving transistor is fixed in its potential or connected to the source or drain thereof to operate in a saturation region with a constant current flow. A current controlling transistor which operates in a linear region is connected in series to the driving transistor, and a video signal for transmitting a light emission or non-emission of a pixel is inputted to the gate of the current controlling transistor through a switching transistor.

公开(公告)号：US08274458B2

公开(公告)日：2012-09-25

申请号：US11656909

申请日：2007-01-22

申请人： Mitsuaki Osame ,  Aya Anzai ,  Yu Yamazaki ,  Tomoyuki Iwabuchi

发明人： Mitsuaki Osame ,  Aya Anzai ,  Yu Yamazaki ,  Tomoyuki Iwabuchi

IPC分类号： G09G3/32

CPC分类号： G09G3/2007 ,  G09G2320/043

摘要： Degradations in light emitting elements occur with the passage of time. A method of driving a light-emitting device is characterized by including the steps of: supplying a light-emitting element with the current in response to an analog video signal during a sustaining period; and turning switch off thereby to make the light-emitting element nonluminous or making first and the second electrodes identical in potential thereby to make the light-emitting element nonluminous during an off time period.

摘要翻译： 随着时间的推移，发光元件的退化发生。 驱动发光装置的方法的特征在于包括以下步骤：在维持期间响应于模拟视频信号向发光元件供应电流; 并关闭开关，从而使发光元件不发光或使第一电极和第二电极的电位相同，从而使发光元件在关闭时间段期间不发光。

公开(公告)号：US08212600B2

公开(公告)日：2012-07-03

申请号：US13213483

申请日：2011-08-19

申请人： Mitsuaki Osame ,  Aya Anzai

发明人： Mitsuaki Osame ,  Aya Anzai

IPC分类号： H03K3/12

CPC分类号： H03K5/249 ,  G09G3/20 ,  G09G3/3225 ,  G09G3/3291 ,  G09G3/3648 ,  G09G2300/08 ,  G09G2310/027 ,  G09G2310/0289 ,  G09G2310/0294 ,  G09G2320/0233 ,  G11C19/184 ,  H03K3/356121

摘要： The data latch circuit of the invention includes a means for short-circuiting an input terminal and an output terminal of an inverter and by connecting the input terminal to one electrode of a capacitor and sampling a data signal or a reference potential to the other electrode of the capacitor, an accurate operation can be obtained without being influenced by variations in the TFT characteristics even when the amplitude of an input signal is small relatively to the width of a power supply voltage.

摘要翻译： 本发明的数据锁存电路包括用于使逆变器的输入端子和输出端子短路的装置，并且将输入端子连接到电容器的一个电极，并将数据信号或参考电位采样到另一个电极的另一个电极 即使当输入信号的幅度相对于电源电压的宽度较小时，也可以不受TFT特性的变化的影响而获得精确的操作。

公开(公告)号：US08188945B2

公开(公告)日：2012-05-29

申请号：US12506465

申请日：2009-07-21

申请人： Shunpei Yamazaki ,  Masahiko Hayakawa ,  Yoshifumi Tanada ,  Mitsuaki Osame ,  Aya Anzai ,  Ryota Fukumoto

发明人： Shunpei Yamazaki ,  Masahiko Hayakawa ,  Yoshifumi Tanada ,  Mitsuaki Osame ,  Aya Anzai ,  Ryota Fukumoto

IPC分类号： G09G3/30 ,  G09G3/10

CPC分类号： H01L27/3262 ,  G09G3/3233 ,  G09G2310/0251 ,  G09G2330/04 ,  H01L27/0248 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/1255 ,  H01L27/3248 ,  H01L27/3265 ,  H01L27/3276 ,  H01L29/78675

摘要： Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.

摘要翻译： 半导体元件由于静电放电损坏而劣化或被破坏。 本发明提供一种其中在每个像素中形成保护装置的半导体器件。 保护装置设置有从由电阻元件，电容器元件和整流元件组成的组中选择的一个或多个元件。 通过在发光元件的像素电极和源电极之间设置保护装置，可以减轻由于在像素电极中积聚的电荷导致的晶体管的源电极或漏电极的电位的突然变化，或 晶体管的漏极。 因此防止了由于静电放电损坏导致的半导体元件的劣化或破坏。

公开(公告)号：US08154015B2

公开(公告)日：2012-04-10

申请号：US12758862

申请日：2010-04-13

申请人： Makoto Udagawa ,  Masahiko Hayakawa ,  Jun Koyama ,  Mitsuaki Osame ,  Aya Anzai

发明人： Makoto Udagawa ,  Masahiko Hayakawa ,  Jun Koyama ,  Mitsuaki Osame ,  Aya Anzai

IPC分类号： H01L51/56

CPC分类号： H01L27/3262 ,  H01L27/12 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/3276 ,  H01L29/78675 ,  H01L29/78696 ,  H01L51/52

摘要： The present invention provides a TFT that has a channel length particularly longer than that of an existing one, specifically, several tens to several hundreds times longer than that of the existing one, and thereby allowing turning to an on-state at a gate voltage particularly higher than the existing one and driving, and allowing having a low channel conductance gd. According to the present invention, not only the simple dispersion of on-current but also the normalized dispersion thereof can be reduced, and other than the reduction of the dispersion between the individual TFTs, the dispersion of the OLEDs themselves and the dispersion due to the deterioration of the OLED can be reduced.

摘要翻译： 本发明提供了一种具有特定长度的TFT的沟道长度，特别是比现有TFT长的几十到几百倍，特别是在栅极电压下变为导通状态 高于现有的和驾驶，并允许具有低通道电导gd。 根据本发明，不仅可以减小导通电流的简单分散，而且可以降低其归一化色散，并且除了各个TFT之间的色散的降低之外，OLED本身的分散和由于 可以降低OLED的劣化。

公开(公告)号：US20110298362A1

公开(公告)日：2011-12-08

申请号：US13211815

申请日：2011-08-17

申请人： Masayuki Sakakura ,  Ritsuko Nagao ,  Mitsuaki Osame ,  Aya Anzai ,  Yu Yamazaki ,  Yoshifumi Tanada

发明人： Masayuki Sakakura ,  Ritsuko Nagao ,  Mitsuaki Osame ,  Aya Anzai ,  Yu Yamazaki ,  Yoshifumi Tanada

IPC分类号： H01J1/62

CPC分类号： H01L27/3276 ,  H01L27/12

摘要： A display device with high-definition, in which display unevenness due to a voltage drop in a wiring or display unevenness due to a variation in characteristics of TFTs are suppressed. The display device of the invention comprises a first wiring for transmitting a video signal and a second wiring for supplying a current to a light emitting element. The first wiring and the second wiring extend parallel to each other, and are formed so as to overlap with each other at least partly with an insulating layer interposed therebetween.

摘要翻译： 具有高清晰度的显示装置，其中由于TFT的特性变化引起的布线中的电压降或显示不均匀性引起的显示不均匀性被抑制。 本发明的显示装置包括用于传输视频信号的第一布线和用于向发光元件提供电流的第二布线。 第一布线和第二布线彼此平行地延伸，并且形成为至少部分地彼此重叠，并且隔着绝缘层。