摘要:
The invention provides a circuit which substantially cancels the input bias current of an operational amplifier having a cascoded NPN-PNP inmput stage. The compensation circuit comprises three transistors. A first NPN transistor is coupled to the input stage such that its collector is coupled to the positive voltage source of the operational amplifier and its emitter is coupled to the emitter of the dual-collector transistor of the input stage. The second transistor, a PNP transistor, has its base coupled to the base of the dual-collector transistor and its collector coupled to the bases of both of the NPN transistors of the input stage, which form the inputs of the operational amplifier. This PNP transistor's emitter is coupled to the collector of a third transistor which is a dual-collector PNP transistor. A third transistor has an emitter coupled to the positive voltage source of the operational amplifier and a base coupled to the base of the NPN transistor of the compensation circuitry. The areas of the two collector regions of the dual collector PNP transistor are ratioed 2:1. This arrangement of three transistors provides a current to the bases of the input transistors substantially equal to the bias current they require; so virtually no external bias current is drawn from the input signals.
摘要:
A system and method for reducing gain error and distortion in an operational amplifier due to errors in the second or integrator stage. A correction circuit may replicate an error current and insert the current into the signal stream to preempt the induction of an error at the amplifier's input. A capacitor may sample the error voltage at the input of the integrator stage of the amplifier and generate a replica of the error current in the integration capacitor to feed it into the input of the integrator stage. This eliminates any nonlinearity errors created by error currents in the compensation or integration capacitor at the second or integrator stage of the two-stage amplifier. Feeding the error current to the integrator stage may be facilitated with a unity gain buffer and a current mirror.
摘要:
A repatterned integrated circuit chip package which balances and/or reduces the package capacitance associated with the gain resistor terminals to reduce the degradation of common mode rejection with frequency.
摘要:
An output distortion circuit includes a first transistor arrangement receiving a nonlinear current associated with a nonlinear differential error signal. The first transistor arrangement produces a reflected base current that is applied to one side of a differential input pair. A second transistor arrangement eliminates the nonlinear differential error signal by producing a replicated base current that replicates the reflected base current. The replicated base current is applied to an opposite side of the differential input pair thus the output distortion cancellation circuit creating a deflection of approximately equal magnitude to the reflected base current so as to eliminate the nonlinear differential error signal.
摘要:
A circuit for removing non-linearity produced when an amplifier includes a load that results in non-linear current levels is provided. The circuit includes a first transistor element being coupled to one of the differential inputs associated with the amplifier. A second transistor element is coupled to another of the differential inputs associated with the amplifier. The second transistor element is coupled to the current associated with the load. Current passing the collectors of the first and second transistors elements are arranged to be always equal so as to eliminate in the circuit the changes between the base currents of the second transistor element and first transistor element caused by the current associated with the load.
摘要:
A circuit includes multiple input sub-circuits coupled to a common output node. Each input sub-circuit includes a transconductance cell. A diode is coupled between the output of the transconductance cell and a common output node. A feedback circuit is coupled between the common output node and a second input of the transconductance cell. A voltage follower is coupled between the common output node and a reference voltage, with an input coupled to the output of the transconductance cell.
摘要:
An electric discharge device includes a bipolar transistor configuration comprising a base, an emitter, and a collector. At least one pinched resistor is formed in a region comprising both the base and emitter so as to produce a pinched resistive area that develops a voltage once the bipolar transistor experiences junction breakdown.
摘要:
An amplifier system includes an instrumentation amplifier arrangement being designed to amplify the difference between two voltage inputs with a defined gain, and to produce a single-ended output referenced to a known reference point. A front end circuit is coupled to the instrumentation amplifier. The front end circuit is configured to include a current clamp to actively limit the current in a gain resistor of the instrumentation amplifier to prevent input currents flowing when the instrumentation amplifier is over-driven.
摘要:
A bias circuit is disclosed for use in a temperature compensation system. The bias circuit provides a current that is proportional to a temperature variation raised to an nth power where |n|>1 in accordance with an embodiment. In further embodiments, the bias circuit includes a PTAT current source for providing to a driver-stage amplifier a current that is substantially proportional to absolute temperature, and a CTAT current source for providing a current that is complementary to absolute temperature, wherein the PTAT and CTAT current sources coact to provide a PTAT2 reference current that is proportional to an absolute temperature variation to the nth power wherein |n|>1.
摘要翻译:公开了一种用于温度补偿系统的偏置电路。 偏置电路提供与根据实施例的升高到第n次幂的温度变化成比例的电流,其中| n |> 1。 在另外的实施例中,偏置电路包括用于向驱动级放大器提供与绝对温度基本成比例的电流的PTAT电流源,以及用于提供与绝对温度互补的电流的CTAT电流源,其中PTAT和 CTAT电流源共同提供与第n次幂的绝对温度变化成比例的PTAT <2>参考电流,其中| n |> 1。
摘要:
A current compensation circuit for an amplifier, for example an operational amplifier, having input and output stages coupled at a high-impedance node, compensates for any modulation of current occurring at the high-impedance node. Particularly, the compensation circuit of the present invention reduces the error current at the high-impedance node resulting from a mismatch in beta between PNP and NPN transistors in the output stage, and reduces any error current resulting from the Early voltage effects of transistors in the output stage. In this manner, the present invention serves to substantially isolate the amplifier input stage from the output load, and from any beta mismatch or Early voltage effects in the transistors of the output stage, resulting in greatly improved open-loop gain.