Bias current compensation for bipolar input stages
    1.
    发明授权
    Bias current compensation for bipolar input stages 失效
    双极输入级的偏置电流补偿

    公开(公告)号:US4855684A

    公开(公告)日:1989-08-08

    申请号:US257716

    申请日:1988-10-14

    IPC分类号: H03F1/56 H03F3/45

    CPC分类号: H03F1/56 H03F3/45071

    摘要: The invention provides a circuit which substantially cancels the input bias current of an operational amplifier having a cascoded NPN-PNP inmput stage. The compensation circuit comprises three transistors. A first NPN transistor is coupled to the input stage such that its collector is coupled to the positive voltage source of the operational amplifier and its emitter is coupled to the emitter of the dual-collector transistor of the input stage. The second transistor, a PNP transistor, has its base coupled to the base of the dual-collector transistor and its collector coupled to the bases of both of the NPN transistors of the input stage, which form the inputs of the operational amplifier. This PNP transistor's emitter is coupled to the collector of a third transistor which is a dual-collector PNP transistor. A third transistor has an emitter coupled to the positive voltage source of the operational amplifier and a base coupled to the base of the NPN transistor of the compensation circuitry. The areas of the two collector regions of the dual collector PNP transistor are ratioed 2:1. This arrangement of three transistors provides a current to the bases of the input transistors substantially equal to the bias current they require; so virtually no external bias current is drawn from the input signals.

    摘要翻译: 本发明提供了一种基本上抵消具有级联NPN-PNP输入级的运算放大器的输入偏置电流的电路。 补偿电路包括三个晶体管。 第一NPN晶体管耦合到输入级,使得其集电极耦合到运算放大器的正电压源,并且其发射极耦合到输入级的双集电极晶体管的发射极。 第二晶体管是PNP晶体管,其基极耦合到双集电极晶体管的基极,其集电极耦合到输入级的NPN晶体管的基极,其形成运算放大器的输入。 该PNP晶体管的发射极耦合到作为双集电极PNP晶体管的第三晶体管的集电极。 第三晶体管具有耦合到运算放大器的正电压源的发射极和耦合到补偿电路的NPN晶体管的基极的基极。 双集电极PNP晶体管的两个集电极区域的面积比为2:1。 三个晶体管的这种布置为输入晶体管的基极提供基本上等于它们所需的偏置电流的电流; 所以几乎不会从输入信号中吸取外部偏置电流。

    Integrator distortion correction circuit
    2.
    发明授权
    Integrator distortion correction circuit 有权
    积分器失真校正电路

    公开(公告)号:US08536923B2

    公开(公告)日:2013-09-17

    申请号:US13188426

    申请日:2011-07-21

    IPC分类号: H03L5/00

    摘要: A system and method for reducing gain error and distortion in an operational amplifier due to errors in the second or integrator stage. A correction circuit may replicate an error current and insert the current into the signal stream to preempt the induction of an error at the amplifier's input. A capacitor may sample the error voltage at the input of the integrator stage of the amplifier and generate a replica of the error current in the integration capacitor to feed it into the input of the integrator stage. This eliminates any nonlinearity errors created by error currents in the compensation or integration capacitor at the second or integrator stage of the two-stage amplifier. Feeding the error current to the integrator stage may be facilitated with a unity gain buffer and a current mirror.

    摘要翻译: 一种用于在第二或积分器级中由于误差而减小运算放大器中的增益误差和失真的系统和方法。 校正电路可以复制误差电流并将电流插入到信号流中以抢占放大器输入端的误差感应。 电容器可以在放大器的积分器级的输入处对误差电压进行采样,并在积分电容器中产生误差电流的复制品,以将其馈送到积分器级的输入端。 这消除了在两级放大器的第二或积分级的补偿或积分电容器中由误差电流产生的任何非线性误差。 通过单位增益缓冲器和电流镜可以使误差电流馈送到积分器级。

    Output distortion cancellation circuit
    4.
    发明授权
    Output distortion cancellation circuit 有权
    输出失真消除电路

    公开(公告)号:US07679442B2

    公开(公告)日:2010-03-16

    申请号:US12103153

    申请日:2008-04-15

    IPC分类号: H03F3/45

    摘要: An output distortion circuit includes a first transistor arrangement receiving a nonlinear current associated with a nonlinear differential error signal. The first transistor arrangement produces a reflected base current that is applied to one side of a differential input pair. A second transistor arrangement eliminates the nonlinear differential error signal by producing a replicated base current that replicates the reflected base current. The replicated base current is applied to an opposite side of the differential input pair thus the output distortion cancellation circuit creating a deflection of approximately equal magnitude to the reflected base current so as to eliminate the nonlinear differential error signal.

    摘要翻译: 输出失真电路包括接收与非线性差分误差信号相关联的非线性电流的第一晶体管装置。 第一晶体管布置产生施加到差分输入对的一侧的反射基极电流。 第二晶体管布置通过产生复制反射的基极电流的复制的基极电流来消除非线性微分误差信号。 复制的基极电流被施加到差分输入对的相对侧,因此输出失真消除电路产生与反射的基极电流大致相等的偏转,以消除非线性微分误差信号。

    CIRCUIT TO PREVENT LOAD-INDUCED DC NONLINEARITY IN AN OP-AMP
    5.
    发明申请
    CIRCUIT TO PREVENT LOAD-INDUCED DC NONLINEARITY IN AN OP-AMP 有权
    电路防止负载诱发的直流非线性在一个OP AMP

    公开(公告)号:US20080186098A1

    公开(公告)日:2008-08-07

    申请号:US11671103

    申请日:2007-02-05

    IPC分类号: H03F3/45

    摘要: A circuit for removing non-linearity produced when an amplifier includes a load that results in non-linear current levels is provided. The circuit includes a first transistor element being coupled to one of the differential inputs associated with the amplifier. A second transistor element is coupled to another of the differential inputs associated with the amplifier. The second transistor element is coupled to the current associated with the load. Current passing the collectors of the first and second transistors elements are arranged to be always equal so as to eliminate in the circuit the changes between the base currents of the second transistor element and first transistor element caused by the current associated with the load.

    摘要翻译: 用于消除放大器包括导致非线性电流电平的负载时产生的非线性的电路。 电路包括耦合到与放大器相关联的差分输入之一的第一晶体管元件。 第二晶体管元件耦合到与放大器相关联的另一个差分输入。 第二晶体管元件耦合到与负载相关联的电流。 通过第一和第二晶体管元件的集电极的电流被布置为总是相等,以便在电路中消除由与负载相关联的电流引起的第二晶体管元件和第一晶体管元件的基极电流之间的变化。

    Analog minimum or maximum voltage selector circuit
    6.
    发明授权
    Analog minimum or maximum voltage selector circuit 有权
    模拟最小或最大电压选择器电路

    公开(公告)号:US08872549B2

    公开(公告)日:2014-10-28

    申请号:US13770880

    申请日:2013-02-19

    IPC分类号: H03K5/153 G01R19/04

    CPC分类号: G01R19/04 G05F1/46

    摘要: A circuit includes multiple input sub-circuits coupled to a common output node. Each input sub-circuit includes a transconductance cell. A diode is coupled between the output of the transconductance cell and a common output node. A feedback circuit is coupled between the common output node and a second input of the transconductance cell. A voltage follower is coupled between the common output node and a reference voltage, with an input coupled to the output of the transconductance cell.

    摘要翻译: 电路包括耦合到公共输出节点的多个输入子电路。 每个输入子电路包括跨导单元。 二极管耦合在跨导单元的输出和公共输出节点之间。 反馈电路耦合在公共输出节点和跨导单元的第二输入端之间。 电压跟随器耦合在公共输出节点和参考电压之间,输入耦合到跨导单元的输出端。

    Front end for an instrumentation amplifier
    8.
    发明授权
    Front end for an instrumentation amplifier 有权
    仪表放大器的前端

    公开(公告)号:US07432766B2

    公开(公告)日:2008-10-07

    申请号:US11671124

    申请日:2007-02-05

    IPC分类号: H02H7/20

    摘要: An amplifier system includes an instrumentation amplifier arrangement being designed to amplify the difference between two voltage inputs with a defined gain, and to produce a single-ended output referenced to a known reference point. A front end circuit is coupled to the instrumentation amplifier. The front end circuit is configured to include a current clamp to actively limit the current in a gain resistor of the instrumentation amplifier to prevent input currents flowing when the instrumentation amplifier is over-driven.

    摘要翻译: 放大器系统包括仪表放大器装置,其被设计成以确定的增益来放大两个电压输入之间的差异,并且产生参考已知参考点的单端输出。 前端电路耦合到仪表放大器。 前端电路被配置为包括电流钳,以主动地限制仪器放大器的增益电阻器中的电流,以防止当仪表放大器过驱动时输入电流流动。

    PTATn bias cell for improved temperature performance
    9.
    发明授权
    PTATn bias cell for improved temperature performance 有权
    PTATn偏置电池,以提高温度性能

    公开(公告)号:US07372317B1

    公开(公告)日:2008-05-13

    申请号:US11284339

    申请日:2005-11-21

    IPC分类号: G05F1/10

    CPC分类号: G05F3/30

    摘要: A bias circuit is disclosed for use in a temperature compensation system. The bias circuit provides a current that is proportional to a temperature variation raised to an nth power where |n|>1 in accordance with an embodiment. In further embodiments, the bias circuit includes a PTAT current source for providing to a driver-stage amplifier a current that is substantially proportional to absolute temperature, and a CTAT current source for providing a current that is complementary to absolute temperature, wherein the PTAT and CTAT current sources coact to provide a PTAT2 reference current that is proportional to an absolute temperature variation to the nth power wherein |n|>1.

    摘要翻译: 公开了一种用于温度补偿系统的偏置电路。 偏置电路提供与根据实施例的升高到第n次幂的温度变化成比例的电流,其中| n |> 1。 在另外的实施例中,偏置电路包括用于向驱动级放大器提供与绝对温度基本成比例的电流的PTAT电流源,以及用于提供与绝对温度互补的电流的CTAT电流源,其中PTAT和 CTAT电流源共同提供与第n次幂的绝对温度变化成比例的PTAT <2>参考电流,其中| n |> 1。

    Current compensation circuit for improved open-loop gain in an amplifier
    10.
    发明授权
    Current compensation circuit for improved open-loop gain in an amplifier 有权
    用于改善放大器开环增益的电流补偿电路

    公开(公告)号:US06483382B1

    公开(公告)日:2002-11-19

    申请号:US09663751

    申请日:2000-09-15

    IPC分类号: H03F345

    摘要: A current compensation circuit for an amplifier, for example an operational amplifier, having input and output stages coupled at a high-impedance node, compensates for any modulation of current occurring at the high-impedance node. Particularly, the compensation circuit of the present invention reduces the error current at the high-impedance node resulting from a mismatch in beta between PNP and NPN transistors in the output stage, and reduces any error current resulting from the Early voltage effects of transistors in the output stage. In this manner, the present invention serves to substantially isolate the amplifier input stage from the output load, and from any beta mismatch or Early voltage effects in the transistors of the output stage, resulting in greatly improved open-loop gain.

    摘要翻译: 用于放大器的电流补偿电路,例如具有在高阻抗节点处耦合的输入和输出级的运算放大器,补偿在高阻抗节点处发生的电流的任何调制。 特别地,本发明的补偿电路降低了在输出级中由PNP和NPN晶体管之间的β失配导致的高阻抗节点处的误差电流,并减少了由于晶体管的早期电压效应导致的任何误差电流 输出阶段。 以这种方式,本发明用于将放大器输入级与输出负载基本隔离,以及输出级的晶体管中的任何β失配或早期电压效应,从而大大提高了开环增益。